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Message-ID: <7c14a83b-9863-d754-d1ba-b2a0617134e9@denx.de>
Date:   Sat, 12 Jan 2019 01:11:53 +0100
From:   Marek Vasut <marex@...x.de>
To:     Tristram.Ha@...rochip.com
Cc:     f.fainelli@...il.com, andrew@...n.ch, Woojung.Huh@...rochip.com,
        netdev@...r.kernel.org, UNGLinuxDriver@...rochip.com
Subject: Re: [RFT][PATCH V2 09/10] net: dsa: microchip: Factor out regmap
 config generation into common header

On 1/11/19 7:56 PM, Tristram.Ha@...rochip.com wrote:
>> OK, so there are clearly restrictions to what can be written and how.
>>
> 
> It is hardware bug.  You need to read those high PHY registers in 32-bit and modify them and write them back even though they are 16-bit.  The regular low PHY registers are not affected.
> 
> Another hardware bug with I2C access is an interrupt will be triggered whenever the PHY register write does not end at 32-bit boundary.  Right now that interrupt is not enabled, and this problem can be easily avoided by disabling a function.
> 
> These problems are for KSZ9477 only.

The regmap constraints can easily deal with this :-)

>>> My point is the driver is the only one who is using these functions to write,
>> so the developer does not try to write the register in the wrong way.
>>>
>>> It turns out the switch that requires exact 8-bit, 16-bit, and 32-bit access
>> functions does not work using the regmap mechanism without additional
>> register manipulation, so we do not really need 3 regmap pointers.
>>
>> Can you elaborate on this ?
>>
> 
> This switch shares design with an Ethernet controller, and the register access uses byte enable.
> 
> There are 4 bits of byte enable indicating whether 1 byte, 2 bytes, 3 bytes, or 4 bytes are accessed.  Normally the 3 bytes option is not used.
> 
> The register address is then shifted right by 2.
> 
> 0x40.1 -> 0x101
> 0x41.1 -> 0x102
> 0x42.1 -> 0x104
> 0x43.1 -> 0x108
> 0x40.2 -> 0x103
> 0x42.2 -> 0x10c
> 0x40.4 -> 0x10f
> 0x44.4 -> 0x11f
> 
> So the only option that works well with the regmap mechanism is 32-bit.
> 
> Problem is the register definitions are mostly 16-bit, while the switch also shares another switch design which uses 8-bit.

So we can have a regmap for each "chunk" of the address space, which as
the correct width, that's fine.

Can you try this series on net-next on the KSZ9477 , fix it up where
needed to make it work with that switch and send out the changes that
were needed ?

Thanks !

-- 
Best regards,
Marek Vasut

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