netdev - Re: [RFC PATCH 1/3] riscv: set HAVE_EFFICIENT_UNALIGNED

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Message-ID: <20190115153931.GF26443@infradead.org>
Date:   Tue, 15 Jan 2019 07:39:31 -0800
From:   Christoph Hellwig <hch@...radead.org>
To:     Björn Töpel <bjorn.topel@...il.com>
Cc:     linux-riscv@...ts.infradead.org, palmer@...ive.com,
        davidlee@...ive.com, daniel@...earbox.net, netdev@...r.kernel.org
Subject: Re: [RFC PATCH 1/3] riscv: set HAVE_EFFICIENT_UNALIGNED_ACCESS

Hmm, while the RISC-V spec requires misaligned load/store support,
who says they are efficient?  Maybe add a little comment that says
on which cpus they are efficient.