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Message-ID: <TY1PR01MB17704CFDBA8A1C2D920B763DC0820@TY1PR01MB1770.jpnprd01.prod.outlook.com>
Date: Wed, 16 Jan 2019 19:24:54 +0000
From: Fabrizio Castro <fabrizio.castro@...renesas.com>
To: Geert Uytterhoeven <geert@...ux-m68k.org>
CC: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Wolfgang Grandegger <wg@...ndegger.com>,
Marc Kleine-Budde <mkl@...gutronix.de>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Simon Horman <horms@...ge.net.au>,
Magnus Damm <magnus.damm@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Thierry Reding <treding@...dia.com>,
Andreas Färber <afaerber@...e.de>,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
Kevin Hilman <khilman@...libre.com>,
Johan Hovold <johan@...nel.org>,
Lukasz Majewski <lukma@...x.de>,
Michal Simek <monstr@...str.eu>,
Michal Vokáč <michal.vokac@...ft.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
Ben Whitten <ben.whitten@...il.com>,
Chris Paterson <Chris.Paterson2@...esas.com>,
Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
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netdev <netdev@...r.kernel.org>,
linux-clk <linux-clk@...r.kernel.org>,
Biju Das <biju.das@...renesas.com>,
"ebiharaml@...linux.co.jp" <ebiharaml@...linux.co.jp>
Subject: RE: [PATCH 08/11] clk: renesas: r8a774c0: Add missing CANFD clock
Hi Geert,
Thank you for your feedback!
> From: Geert Uytterhoeven <geert@...ux-m68k.org>
> Sent: 16 January 2019 19:06
> Subject: Re: [PATCH 08/11] clk: renesas: r8a774c0: Add missing CANFD clock
>
> Hi Fabrizio,
>
> Thanks for your patch!
>
> On Wed, Jan 16, 2019 at 7:39 PM Fabrizio Castro
> <fabrizio.castro@...renesas.com> wrote:
> > This patch adds the missing CANFD clock to the r8a774c0 specific
> > clock driver.
>
> Are you sure the CANFD clock exists on RZ/G2E?
I yet have to run tests on the board specific to CANFD, but we know for sure that's
going to appear on the RZ/G2E (if it's not in the revision of the SoC we have already).
Japan have confirmed that everything CANFD-wise should be the same as per the
corresponding Gen3 parts, and that's why are pushing this patch (and shortly
something similar for the r8a774a1) for it as it's on our critical path. Anyways, the
HW of the EK874 should support CANFD properly, therefore I am going to try and
run some tests (as soon as I sort out the cables), so that we clear any doubts.
Would you rather we held back all of the CAN related changes for now?
>
> > Signed-off-by: Fabrizio Castro <fabrizio.castro@...renesas.com>
> > Reviewed-by: Chris Paterson <Chris.Paterson2@...esas.com>
>
> > --- a/drivers/clk/renesas/r8a774c0-cpg-mssr.c
> > +++ b/drivers/clk/renesas/r8a774c0-cpg-mssr.c
>
> > --- a/include/dt-bindings/clock/r8a774c0-cpg-mssr.h
> > +++ b/include/dt-bindings/clock/r8a774c0-cpg-mssr.h
> > @@ -48,13 +48,14 @@
> > #define R8A774C0_CLK_ZA2 37
> > #define R8A774C0_CLK_ZA8 38
> > #define R8A774C0_CLK_Z2D 39
> > -#define R8A774C0_CLK_MSO 40
> > -#define R8A774C0_CLK_R 41
> > -#define R8A774C0_CLK_OSC 42
> > -#define R8A774C0_CLK_LV0 43
> > -#define R8A774C0_CLK_LV1 44
> > -#define R8A774C0_CLK_CSI0 45
> > -#define R8A774C0_CLK_CP 46
> > -#define R8A774C0_CLK_CPEX 47
> > +#define R8A774C0_CLK_CANFD 40
> > +#define R8A774C0_CLK_MSO 41
> > +#define R8A774C0_CLK_R 42
> > +#define R8A774C0_CLK_OSC 43
> > +#define R8A774C0_CLK_LV0 44
> > +#define R8A774C0_CLK_LV1 45
> > +#define R8A774C0_CLK_CSI0 46
> > +#define R8A774C0_CLK_CP 47
> > +#define R8A774C0_CLK_CPEX 48
>
> This file is part of the DT ABI, hence list of definitions is append-only.
Will fix this with a v2
Thanks,
Fab
>
> Please add R8A774C0_CLK_CANFD at the end, i.e.
>
> #define R8A774C0_CLK_CANFD 48
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
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