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Message-ID: <20190123002240.GF3634@lunn.ch>
Date: Wed, 23 Jan 2019 01:22:40 +0100
From: Andrew Lunn <andrew@...n.ch>
To: John David Anglin <dave.anglin@...l.net>
Cc: Russell King <linux@....linux.org.uk>,
Vivien Didelot <vivien.didelot@...oirfairelinux.com>,
Florian Fainelli <f.fainelli@...il.com>, netdev@...r.kernel.org
Subject: Re: net: phylink: dsa: mv88e6xxx: flaky link detection on switch
ports with internal PHYs
> > It does not need to. There are two options here:
> >
> > 1) The PHY has no interrupt. phylib will poll the PHY once per second
> > for link changes.
> >
> > 2) The PHY has in interrupt. Link changes will cause the interrupt to
> > fire, and the phylib will then read the current state.
> >
> > For PHYs embedded within a switch driver by mv88e6xxx interrupts
> > should always be used.
Hi Dave
>From my Espressobin
cat /proc/interrupts
...
44: 0 0 mv88e6xxx-g1 3 Edge mv88e6xxx-g1-atu-prob
46: 0 0 mv88e6xxx-g1 5 Edge mv88e6xxx-g1-vtu-prob
48: 38 24 mv88e6xxx-g1 7 Edge mv88e6xxx-g2
51: 0 1 mv88e6xxx-g2 1 Edge !soc!internal-regs@...00000!mdio@...04!switch0@...dio:11
52: 0 0 mv88e6xxx-g2 2 Edge !soc!internal-regs@...00000!mdio@...04!switch0@...dio:12
53: 38 23 mv88e6xxx-g2 3 Edge !soc!internal-regs@...00000!mdio@...04!switch0@...dio:13
These are PHY interrupts.
> I don't think option 2) is implemented. Didn't see any irq code in phy.c.
You would not. All the interrupt code is in the PHY core and the PHY
driver. drivers/net/dsa/mv88e6xxx/phy.c is just a bunch of helpers
which allow the mdio bus driver to access phy registers. The PHY
driver itself is drivers/net/phy/marvell.c, and the interrupt handling
is spread between that and drivers/net/phy/phy.c
> If I remember correctly, one needs to use clause 45 accesses to get at
> the PHY registers in the 88E6341.
Nope. The PHYs are c22 devices. The SERDES are probably C45, but those
are not being used here.
Andrew
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