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Date:   Tue, 5 Feb 2019 00:06:29 +0100
From:   Heiner Kallweit <hkallweit1@...il.com>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Florian Fainelli <f.fainelli@...il.com>,
        David Miller <davem@...emloft.net>,
        Nikita Yushchenko <nikita.yoush@...entembedded.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>
Subject: Re: [PATCH 1/3 net-next] net: phy: aquantia: improve setting speed
 and duplex in aqr_read_status

On 04.02.2019 23:23, Andrew Lunn wrote:
>> I'd like to use standard registers wherever possible. This patch is
>> meant as a quick win to improve what we do already in aqr_read_status.
>> Once we have a generic c45 read_status function we should switch to it.
> 
> Hi Heiner
> 
> I don't see much point in adding code which we know we are soon going
> to replace. Just replace it.
> 
OK, let me have a closer look at the other patches you sent me.
To test them I need to get my DTU running first. And I need to check
what happens if certain standard registers don't report what they
should and how to deal with this. E.g. the AQCS109 according to the
datasheet reports in the speed ability register that it is 10G-capable,
what it is not.

>> However I assume that information like interface mode we still have
>> to read from vendor registers.
> 
> For the Aquantia PHY, yes. It appears the Marvell PHY does not have
> any registers which indicate this, so it uses heuristics based on the
> link speed.
> 
>     Andrew
> 
Heiner

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