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Date:   Wed, 13 Feb 2019 11:15:55 +0000
From:   Colin Ian King <colin.king@...onical.com>
To:     Siva Reddy <siva.kallam@...sung.com>,
        Vipul Pandya <vipul.pandya@...sung.com>,
        Girish K S <ks.giri@...sung.com>,
        Byungho An <bh74.an@...sung.com>,
        "David S. Miller" <davem@...emloft.net>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>
Cc:     linux-kernel@...r.kernel.org
Subject:  net: sxgbe: issue with case statement in sxgbe_mtl_init

Hi,

Static analysis with CoverityScan has detected two switch statements
where all of the case statements are deadcode.  The values being
switched on are masked and these will never match any of the values
being checked, so this clearly is an error.

Function sxgbe_mtl_init, drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c:

 31        /* ETS Algorith */
 32        switch (etsalg & SXGBE_MTL_OPMODE_ESTMASK) {

   dead_error_condition: The switch value etsalg & 3U cannot be 4294967199U.
   CID 1195543 (#1 of 3): Logically dead code

 33        case ETS_WRR:
 34                reg_val &= ETS_WRR;
 35                break;

 dead_error_condition: The switch value etsalg & 3U cannot be 32U.
   CID 1195543 (#2 of 3): Logically dead code

 36        case ETS_WFQ:
 37                reg_val |= ETS_WFQ;
 38                break;

  dead_error_condition: The switch value etsalg & 3U cannot be 64U.
   CID 1195543 (#3 of 3): Logically dead code

 39        case ETS_DWRR:
 40                reg_val |= ETS_DWRR;
 41                break;
 42        }
 43        writel(reg_val, ioaddr + SXGBE_MTL_OP_MODE_REG);
 44

And also in the following switch statement:

 45        switch (raa & SXGBE_MTL_OPMODE_RAAMASK) {

 dead_error_condition: The switch value raa & 1U cannot be 4294967291U.
   CID 1195544 (#1 of 2): Logically dead code

 46        case RAA_SP:
 47                reg_val &= RAA_SP;
 48                break;

  dead_error_condition: The switch value raa & 1U cannot be 4U.
   CID 1195544 (#2 of 2): Logically dead code

 49        case RAA_WSP:
 50                reg_val |= RAA_WSP;
 51                break;
 52        }
 53        writel(reg_val, ioaddr + SXGBE_MTL_OP_MODE_REG);
 54}

Colin

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