netdev - Re: TC stats / hw offload question

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Message-ID: <20190214151755.GA47877@C02RW35GFVH8>
Date:   Thu, 14 Feb 2019 10:17:55 -0500
From:   Andy Gospodarek <andy@...yhouse.net>
To:     Jamal Hadi Salim <jhs@...atatu.com>
Cc:     Edward Cree <ecree@...arflare.com>,
        netdev <netdev@...r.kernel.org>, Jiri Pirko <jiri@...nulli.us>,
        Cong Wang <xiyou.wangcong@...il.com>,
        Or Gerlitz <gerlitz.or@...il.com>,
        PJ Waskiewicz <pjwaskiewicz@...il.com>,
        Anjali Singhai Jain <anjali.singhai@...el.com>,
        Jakub Kicinski <jakub.kicinski@...ronome.com>
Subject: Re: TC stats / hw offload question

On Thu, Feb 14, 2019 at 07:39:28AM -0500, Jamal Hadi Salim wrote:
> 
> On 2019-02-11 6:44 a.m., Edward Cree wrote:
> 
> >   But since the
> >   other vendors don't seem to do that, I wondered if there was a
> >   reason, or if perhaps the counter resources (and PCI bw to read
> >   them) could be saved if all those separate counters aren't really
> >   needed.
> 
> Probably nobody has paid attention or asked as you did.

That's not totally true, but I'm glad to hear that others are
considering it.

> Will let the h/w folks speak for themselves. My understanding
> based on experience is counters are cheap. Most modern NICs
> and ASICs have a gazillion of them at their disposal.

Counters can be cheap to implement (though that does not always mean
that everyone chooses to add many of them to hardware), but the real
cost to them, as Edward points out, is the cost of accessing them an
keeping them up to date.  If we are concerned about keeping track of
flow counters on thousands (or more) flows the cost on the PCI bus can
be quite high.

We have been looking at a few options to deal with tracking this massive
number of counts, but are open to hearing what others feel they would
like to see happen to this.  Though stats sometimes seem boring to some
developers, they are critical and we have been considering whether or
not we need to think about different driver or global infra to handle
it.