netdev - Re: [PATCH] net: dsa: qca8k: Enable delay for RGMII

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <d930360c-b49d-23f8-7887-f0550d81b118@ysoft.com>
Date:   Mon, 18 Feb 2019 14:35:53 +0100
From:   Michal Vokáč <michal.vokac@...ft.com>
To:     Vinod Koul <vkoul@...nel.org>, David S Miller <davem@...emloft.net>
Cc:     linux-arm-msm@...r.kernel.org,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        netdev@...r.kernel.org, Niklas Cassel <niklas.cassel@...aro.org>,
        Andrew Lunn <andrew@...n.ch>,
        Florian Fainelli <f.fainelli@...il.com>
Subject: Re: [PATCH] net: dsa: qca8k: Enable delay for RGMII_ID mode

On 18. 02. 19 14:03, Vinod Koul wrote:
> RGMII_ID specifies that we should have internal delay, so resurrect the
> delay addition routine but under the RGMII_ID mode.
> 
> Fixes: 40269aa9f40a ("net: dsa: qca8k: disable delay for RGMII mode")
> Signed-off-by: Vinod Koul <vkoul@...nel.org>

Fixes the problem on my imx6dl platform with QCA8334 switch.
Thank you!

Tested-by: Michal Vokáč <michal.vokac@...ft.com>

> ---
>   drivers/net/dsa/qca8k.c | 12 ++++++++++++
>   1 file changed, 12 insertions(+)
> 
> diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
> index a4b6cda38016..aa1f7f1b20d3 100644
> --- a/drivers/net/dsa/qca8k.c
> +++ b/drivers/net/dsa/qca8k.c
> @@ -443,6 +443,18 @@ qca8k_set_pad_ctrl(struct qca8k_priv *priv, int port, int mode)
>   		val = QCA8K_PORT_PAD_RGMII_EN;
>   		qca8k_write(priv, reg, val);
>   		break;
> +	case PHY_INTERFACE_MODE_RGMII_ID:
> +		/* RGMII_ID needs internal delay. This is enabled through
> +		 * PORT5_PAD_CTRL for all ports, rather than individual port
> +		 * registers
> +		 */
> +		qca8k_write(priv, reg,
> +			    QCA8K_PORT_PAD_RGMII_EN |
> +			    QCA8K_PORT_PAD_RGMII_TX_DELAY(3) |
> +			    QCA8K_PORT_PAD_RGMII_RX_DELAY(3));
> +		qca8k_write(priv, QCA8K_REG_PORT5_PAD_CTRL,
> +			    QCA8K_PORT_PAD_RGMII_RX_DELAY_EN);
> +		break;
>   	case PHY_INTERFACE_MODE_SGMII:
>   		qca8k_write(priv, reg, QCA8K_PORT_PAD_SGMII_EN);
>   		break;
>