netdev - Re: Handling an Extra Signal at PHY Reset

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Message-ID: <efd27592a4f4e76fb5016d1ba1314d4e29003db3.camel@bootlin.com>
Date:   Thu, 21 Feb 2019 09:50:26 +0100
From:   Paul Kocialkowski <paul.kocialkowski@...tlin.com>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Florian Fainelli <f.fainelli@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>, netdev@...r.kernel.org,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
        Mylène Josserand 
        <mylene.josserand@...tlin.com>
Subject: Re: Handling an Extra Signal at PHY Reset

Hi Andrew,

On Thu, 2019-02-21 at 02:49 +0100, Andrew Lunn wrote:
> On Tue, Feb 19, 2019 at 10:14:20AM +0100, Paul Kocialkowski wrote:
> > Hi,
> > 
> > We are dealing with an Ethernet PHY (Marvell 88E1512) that comes with a
> > CONFIG pin that must be connected to one of the other pins of the PHY
> > to configure the LSB of the PHY address as well as I/O voltages (see
> > section 2.18.1 Hardware Configuration of the datasheet). It must be
> > connected "soon after reset" for the PHY to be correctly configured.
> 
> Hi Paul
> 
> Turns out the datasheet is publicly available.
> 
> So you can at run-time configure the voltage. Page 2, register 24, bit
> 13.
> 
> So back to my last question. Can you address the PHY without using the
> switch? Even if it has the wrong voltage?
> 
> If you can, you could set the correct voltage in the probe() function.

Thanks for looking into our issue :)

I did some more investigating in the meantime, and the hardware logic
actually connects our CONFIG and LED pins when the controlling GPIO is
open-drain.

I can also confirm that it does not prevent contacting the PHY on the
MDIO bus, contrary to what I have stated previously.

So the important step for us to do is to disconnect the CONFIG and LED
pins (at least so we can see our LED blink properly) once the PHY was
reset. But we can't really rely on the fact that the pins were
connected before PHY reset (e.g. U-Boot may have disconnected them
already to use Ethernet) so we still need a way to connect them before
the PHY reset from the MDIO bus core hits, and disconnect them after
that.

Cheers,

Paul

-- 
Paul Kocialkowski, Bootlin
Embedded Linux and kernel engineering
https://bootlin.com