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Date:   Sat, 23 Feb 2019 16:23:04 +0100
From:   Andrew Lunn <andrew@...n.ch>
To:     Parshuram Raju Thombare <pthombar@...ence.com>
Cc:     "nicolas.ferre@...rochip.com" <nicolas.ferre@...rochip.com>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "f.fainelli@...il.com" <f.fainelli@...il.com>,
        "hkallweit1@...il.com" <hkallweit1@...il.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Rafal Ciepiela <rafalc@...ence.com>,
        Piotr Sroka <piotrs@...ence.com>, Jan Kotas <jank@...ence.com>
Subject: Re: [PATCH 2/3] net: ethernet: add c45 PHY support in MDIO
 read/write functions.

> >On Fri, Feb 22, 2019 at 08:12:42PM +0000, Parshuram Thombare wrote:
> >> This patch modify MDIO read/write functions to support communication
> >> with C45 PHY in Cadence ethernet controller driver.
> >
> >Hi Parshuram
> >
> >Are all versions of the MDIO controller capable of doing C45?
> >
> >    Andrew
> Now driver support c22 and c45 PHY. 
> Are you suggesting to add check for C45 PHY using is_c45 in phydev ?

You are unconditionally supporting C45. Are there versions of the
hardware which don't actually support C45? You have this endless loop:

+       /* wait for end of transfer */
+       while (!MACB_BFEXT(IDLE, macb_readl(bp, NSR)))
+               cpu_relax();

If there is hardware which does not support C45, will this loop
forever?

	Andrew

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