netdev - [RFC iproute2-next 1/3] devlink: add support for PCIe port flavours

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Date:   Fri,  1 Mar 2019 10:35:08 -0800
From:   Jakub Kicinski <jakub.kicinski@...ronome.com>
To:     jiri@...nulli.us
Cc:     netdev@...r.kernel.org, oss-drivers@...ronome.com,
        Jakub Kicinski <jakub.kicinski@...ronome.com>
Subject: [RFC iproute2-next 1/3] devlink: add support for PCIe port flavours

Add support for decoding PCIe port flavours.  Example:

$ devlink port
pci/0000:82:00.0/0: type eth netdev p4p1 flavour physical
pci/0000:82:00.0/10000: type eth netdev eth0 flavour pcie_pf pf 0
pci/0000:82:00.0/10001: type eth netdev eth1 flavour pcie_vf pf 0 vf 0
pci/0000:82:00.0/10002: type eth netdev eth2 flavour pcie_vf pf 0 vf 1

$ devlink -jp port
{
    "port": {
        "pci/0000:82:00.0/0": {
            "type": "eth",
            "netdev": "p4p1",
            "flavour": "physical"
        },
        "pci/0000:82:00.0/10000": {
            "type": "eth",
            "netdev": "eth0",
            "flavour": "pci_pf",
            "pf": 0,
        },
        "pci/0000:82:00.0/10001": {
            "type": "eth",
            "netdev": "eth1",
            "flavour": "pci_vf",
            "pf": 0,
            "vf": 0
        },
        "pci/0000:82:00.0/10002": {
            "type": "eth",
            "netdev": "eth2",
            "flavour": "pci_vf",
            "pf": 0,
            "vf": 1
        }
    }
}

Signed-off-by: Jakub Kicinski <jakub.kicinski@...ronome.com>
---
 devlink/devlink.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/devlink/devlink.c b/devlink/devlink.c
index dc6e73fec20c..055b09808226 100644
--- a/devlink/devlink.c
+++ b/devlink/devlink.c
@@ -414,6 +414,8 @@ static const enum mnl_attr_data_type devlink_policy[DEVLINK_ATTR_MAX + 1] = {
 	[DEVLINK_ATTR_HEALTH_REPORTER_RECOVER_COUNT] = MNL_TYPE_U64,
 	[DEVLINK_ATTR_HEALTH_REPORTER_DUMP_TS] = MNL_TYPE_U64,
 	[DEVLINK_ATTR_HEALTH_REPORTER_GRACEFUL_PERIOD] = MNL_TYPE_U64,
+	[DEVLINK_ATTR_PORT_PCI_PF_NUMBER] = MNL_TYPE_U32,
+	[DEVLINK_ATTR_PORT_PCI_VF_NUMBER] = MNL_TYPE_U32,
 };
 
 static int attr_cb(const struct nlattr *attr, void *data)
@@ -2771,6 +2773,10 @@ static const char *port_flavour_name(uint16_t flavour)
 		return "cpu";
 	case DEVLINK_PORT_FLAVOUR_DSA:
 		return "dsa";
+	case DEVLINK_PORT_FLAVOUR_PCI_PF:
+		return "pci_pf";
+	case DEVLINK_PORT_FLAVOUR_PCI_VF:
+		return "pci_vf";
 	default:
 		return "<unknown flavour>";
 	}
@@ -2809,6 +2815,13 @@ static void pr_out_port(struct dl *dl, struct nlattr **tb)
 	if (tb[DEVLINK_ATTR_PORT_SPLIT_GROUP])
 		pr_out_uint(dl, "split_group",
 			    mnl_attr_get_u32(tb[DEVLINK_ATTR_PORT_SPLIT_GROUP]));
+	if (tb[DEVLINK_ATTR_PORT_PCI_PF_NUMBER])
+		pr_out_uint(dl, "pf",
+			    mnl_attr_get_u32(tb[DEVLINK_ATTR_PORT_PCI_PF_NUMBER]));
+	if (tb[DEVLINK_ATTR_PORT_PCI_VF_NUMBER])
+		pr_out_uint(dl, "vf",
+			    mnl_attr_get_u32(tb[DEVLINK_ATTR_PORT_PCI_VF_NUMBER]));
+
 	pr_out_port_handle_end(dl);
 }
 
-- 
2.19.2