lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Message-ID: <acc4d386-0d9d-0542-1b3d-f48d32f9dfe9@gmail.com> Date: Sat, 2 Mar 2019 15:23:30 +0100 From: Heiner Kallweit <hkallweit1@...il.com> To: Andrew Lunn <andrew@...n.ch> Cc: Vivien Didelot <vivien.didelot@...il.com>, Florian Fainelli <f.fainelli@...il.com>, David Miller <davem@...emloft.net>, "netdev@...r.kernel.org" <netdev@...r.kernel.org> Subject: Re: [PATCH net] net: dsa: mv8e6xxx: fix number of internal PHYs for 88E6390(X) On 01.03.2019 23:31, Andrew Lunn wrote: > On Fri, Mar 01, 2019 at 07:40:59PM +0100, Heiner Kallweit wrote: >> Ports 9 and 10 don't have internal PHY's but are (dependent on the >> version) SERDES/SGMII/XAUI/RXAUI ports. > > Hi Heiner > > All members of the MV88E6XXX_FAMILY_6390 are 11 ports, but only 9 > PHYs. So 88E6190, 88E6190X, 88E6191, and 88E6290 as well. > Thanks for the hint, I amended the patch accordingly. > Andrew > Heiner
Powered by blists - more mailing lists