netdev - Re: [PATCH net-next 1/1] net: dsa: qca8k: Fix internal PHY MDIO address

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Message-ID: <20190322000120.7a87fde5@nic.cz>
Date:   Fri, 22 Mar 2019 00:01:20 +0100
From:   Marek Behun <marek.behun@....cz>
To:     Christian Lamparter <chunkeey@...il.com>
Cc:     Florian Fainelli <f.fainelli@...il.com>, netdev@...r.kernel.org,
        Andrew Lunn <andrew@...n.ch>,
        Michal Vokáč <vokac.m@...il.com>,
        John Crispin <john@...ozen.org>,
        Wei Yongjun <weiyongjun1@...wei.com>
Subject: Re: [PATCH net-next 1/1] net: dsa: qca8k: Fix internal PHY MDIO
 address

> Hm, it's not really a "external mode". But let's try one more time.
> The idea is that if an external mdio-bus (from the SoC) has already
> registered the PHY 0x0 - 0x4 from the QCA8337, the qca8k should not
> expose the same PHYs as it's own mdio-bus because then the PHYs end
> up being registered twice.

Hi,
yes, I understand this bit. What I was talking about was that the MDIO
addresses of internal PHYs are 0 to 4, it does not matter if you access
them via switch or directly. But the current code for direct access is
using addresses 1 to 5, which does not work at all. It should also
substract 1 from the port number.

Marek