lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 2 Apr 2019 23:55:22 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Vladimir Oltean <olteanv@...il.com>
Cc:     f.fainelli@...il.com, vivien.didelot@...il.com,
        davem@...emloft.net, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org, linus.walleij@...aro.org,
        georg.waibel@...sor-technik.de
Subject: Re: [PATCH net-next 10/17] net: dsa: Introduce driver for NXP
 SJA1105 5-port L2 switch

> +static int sja1105_init_mii_settings(struct sja1105_private *priv,
> +				     struct sja1105_dt_port *ports)
> +{
> +	struct device *dev = &priv->spidev->dev;
> +	struct sja1105_xmii_params_entry *mii;
> +	struct sja1105_table *table;
> +	int i;
> +
> +	table = &priv->static_config.tables[BLK_IDX_XMII_PARAMS];
> +
> +	/* Discard previous xMII Mode Parameters Table */
> +	if (table->entry_count) {
> +		kfree(table->entries);
> +		table->entry_count = 0;
> +	}
> +
> +	table->entries = kcalloc(MAX_XMII_PARAMS_COUNT,
> +				 table->ops->unpacked_entry_size, GFP_KERNEL);
> +	if (!table->entries)
> +		return -ENOMEM;
> +
> +	/* Override table based on phylib DT bindings */
> +	table->entry_count = MAX_XMII_PARAMS_COUNT;
> +
> +	mii = table->entries;
> +
> +	for (i = 0; i < SJA1105_NUM_PORTS; i++) {
> +		switch (ports[i].phy_mode) {
> +		case PHY_INTERFACE_MODE_MII:
> +			mii->xmii_mode[i] = XMII_MODE_MII;
> +			break;
> +		case PHY_INTERFACE_MODE_RMII:
> +			mii->xmii_mode[i] = XMII_MODE_RMII;
> +			break;
> +		case PHY_INTERFACE_MODE_RGMII:
> +		case PHY_INTERFACE_MODE_RGMII_ID:
> +		case PHY_INTERFACE_MODE_RGMII_RXID:
> +		case PHY_INTERFACE_MODE_RGMII_TXID:
> +			mii->xmii_mode[i] = XMII_MODE_RGMII;
> +			break;

https://www.nxp.com/docs/en/data-sheet/SJA1105.pdf

Section 6.2.3 RGMII signaling and encoding

Note that RGMII requires an external delay of between 1.5 ns and 2 ns
on TXC and RXC.

So it sounds like the switch only supports PHY_INTERFACE_MODE_RGMII.

If the port is in MAC mode, you should pass this phy-mode to the PHY
when you connect to it. The PHY can then add the delay if needed.

If however, the port is in PHY mode, and it is asked to do RGMII other
than PHY_INTERFACE_MODE_RGMII, you should report an error. It cannot
do it.

   Andrew

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ