netdev - Re: [PATCH net-next v4 1/2] net: phy: marvell10g: implement suspend/resume callbacks

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <af550dd9-1374-621d-a37a-8e32314be01c@gmail.com>
Date:   Wed, 3 Apr 2019 07:09:55 +0200
From:   Heiner Kallweit <hkallweit1@...il.com>
To:     Russell King - ARM Linux admin <linux@...linux.org.uk>
Cc:     Antoine Tenart <antoine.tenart@...tlin.com>, davem@...emloft.net,
        andrew@...n.ch, f.fainelli@...il.com, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org, thomas.petazzoni@...tlin.com,
        maxime.chevallier@...tlin.com, gregory.clement@...tlin.com,
        miquel.raynal@...tlin.com, nadavh@...vell.com, stefanc@...vell.com,
        mw@...ihalf.com
Subject: Re: [PATCH net-next v4 1/2] net: phy: marvell10g: implement
 suspend/resume callbacks

On 03.04.2019 00:10, Russell King - ARM Linux admin wrote:
> On Tue, Apr 02, 2019 at 08:17:16PM +0200, Heiner Kallweit wrote:
>> On 02.04.2019 15:10, Antoine Tenart wrote:
>>> This patch adds the suspend/resume callbacks for Marvell 10G PHYs. The
>>> three PCS (base-t, base-r and 1000base-x) are set in low power (the PCS
>>> are powered down) when the PHY isn't used.
>>>
>>> Signed-off-by: Antoine Tenart <antoine.tenart@...tlin.com>
>>> ---
>>>  drivers/net/phy/marvell10g.c | 12 +++++++++++-
>>>  1 file changed, 11 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c
>>> index 80678919641d..9ee033c8a12b 100644
>>> --- a/drivers/net/phy/marvell10g.c
>>> +++ b/drivers/net/phy/marvell10g.c
>>> @@ -51,6 +51,8 @@ enum {
>>>  	MV_AN_STAT1000		= 0x8001, /* 1000base-T status register */
>>>  
>>>  	/* Vendor2 MMD registers */
>>> +	MV_V2_PORT_CTRL		= 0xf001,
>>> +	MV_V2_PORT_CTRL_PWRDOWN = 0x0800,
>>
>> If this driver is touched again I think it would be good to change all
>> such constants to BIT() and GENMASK(), ideally combined with the macros
>> from bitfields.h. This makes it much easier to check the code against the
>> datasheet. Apart from that:
> 
> Specifically, which constants are you talking about?
> 
> I think there's only MV_PCS_PAIRSWAP_MASK and MV_V2_TEMP_CTRL_MASK,
> which would be confusing to change given that the following definitions
> are values for the masked field.
> 
Exactly, MV_V2_TEMP_CTRL_MASK is a good example. My personal preference is
to define the mask as GENMASK(15, 14) and the field values as 0 and 3.
Then it's aligned with the datasheet that says:
15:14 Temperature Sense Enable, 11 = Disable
Macros FIELD_GET and FIELD_PREP are perfect to deal with such fields.

> However, MV_V2_PORT_CTRL_PWRDOWN should be defined using BIT() in any
> case.
>