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Date:   Thu, 4 Apr 2019 14:46:38 +0300
From:   Gal Pressman <galpress@...zon.com>
To:     Saeed Mahameed <saeedm@...lanox.com>,
        Tariq Toukan <tariqt@...lanox.com>
CC:     "David S. Miller" <davem@...emloft.net>, <netdev@...r.kernel.org>
Subject: Re: [net-next 13/15] net/mlx5: A write memory barrier is sufficient
 in EQ ci update

On 03-Apr-19 02:03, Saeed Mahameed wrote:
> From: Tariq Toukan <tariqt@...lanox.com>
> 
> Soften the memory barrier call of mb() by a sufficient wmb() in the
> consumer index update of the event queues.
> 
> Signed-off-by: Tariq Toukan <tariqt@...lanox.com>
> Signed-off-by: Saeed Mahameed <saeedm@...lanox.com>
> ---
>  drivers/net/ethernet/mellanox/mlx5/core/eq.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eq.c b/drivers/net/ethernet/mellanox/mlx5/core/eq.c
> index 46a747f7c162..e9837aeb7088 100644
> --- a/drivers/net/ethernet/mellanox/mlx5/core/eq.c
> +++ b/drivers/net/ethernet/mellanox/mlx5/core/eq.c
> @@ -707,7 +707,7 @@ void mlx5_eq_update_ci(struct mlx5_eq *eq, u32 cc, bool arm)
>  
>  	__raw_writel((__force u32)cpu_to_be32(val), addr);
>  	/* We still want ordering, just not swabbing, so add a barrier */
> -	mb();
> +	wmb();

Shouldn't this barrier be placed prior to __raw_writel()?

>  }
>  EXPORT_SYMBOL(mlx5_eq_update_ci);
>  
> 

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