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Message-Id: <20190408205328.062042a4f6e12f750bd4c05e@suse.de>
Date: Mon, 8 Apr 2019 20:53:28 +0200
From: Thomas Bogendoerfer <tbogendoerfer@...e.de>
To: Alexandre Belloni <alexandre.belloni@...tlin.com>
Cc: Ralf Baechle <ralf@...ux-mips.org>,
Paul Burton <paul.burton@...s.com>,
James Hogan <jhogan@...nel.org>,
Dmitry Torokhov <dmitry.torokhov@...il.com>,
Lee Jones <lee.jones@...aro.org>,
"David S. Miller" <davem@...emloft.net>,
Alessandro Zummo <a.zummo@...ertech.it>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Jiri Slaby <jslaby@...e.com>, linux-mips@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-input@...r.kernel.org,
netdev@...r.kernel.org, linux-rtc@...r.kernel.org,
linux-serial@...r.kernel.org
Subject: Re: [PATCH 4/6] MIPS: SGI-IP27: fix readb/writeb addressing
On Mon, 8 Apr 2019 16:58:34 +0200
Alexandre Belloni <alexandre.belloni@...tlin.com> wrote:
> On 08/04/2019 16:20:56+0200, Thomas Bogendoerfer wrote:
> > diff --git a/drivers/rtc/rtc-m48t35.c b/drivers/rtc/rtc-m48t35.c
> > index 0cf6507de3c7..05f0d91366af 100644
> > --- a/drivers/rtc/rtc-m48t35.c
> > +++ b/drivers/rtc/rtc-m48t35.c
> > @@ -24,6 +24,16 @@
> >
> > struct m48t35_rtc {
> > u8 pad[0x7ff8]; /* starts at 0x7ff8 */
> > +#ifdef CONFIG_SGI_IP27
> > + u8 hour;
> > + u8 min;
> > + u8 sec;
> > + u8 control;
> > + u8 year;
> > + u8 month;
> > + u8 date;
> > + u8 day;
> > +#else
>
> I'm not sure why the RTC driver has to know about that. Shouldn't your
> accessors be fixing that?
no, because the hardware is weird. RTC is connected to IOC3 byte bus and IOC3 is
connected to PCI. With a correct readb for PCI bus access to RTC behind IOC3 is byte
swapped.
Thomas.
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