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Message-ID: <20190410112531.23482-1-kavyasree.kotagiri@microchip.com>
Date: Wed, 10 Apr 2019 11:31:57 +0000
From: <Kavyasree.Kotagiri@...rochip.com>
To: <andrew@...n.ch>, <hkallweit1@...il.com>, <davem@...emloft.net>
CC: <netdev@...r.kernel.org>, <Kavyasree.Kotagiri@...rochip.com>
Subject: [PATCH v4 0/2] net: phy: mscc: Improvements to VSC8514 PHY driver
The VSC8514 PHY is a 4-ports PHY that is 10/100/1000BASE-T, 100BASE-FX,
1000BASE-X, can communicate with the MAC via QSGMII.
The MAC interface protocol for each port within QSGMII can
be either 1000BASE-X or SGMII, if the QSGMII MAC that the VSC8514 is
connecting to supports this functionality.
VSC8514 also supports SGMII MAC-side autonegotiation on each individual
port, downshifting, can set the blinking pattern of each of its 4 LEDs,
SyncE, 1000BASE-T Ring Resiliency as well as HP Auto-MDIX detection.
This patch series adds support for 10BASE-T, 100BASE-TX, and
1000BASE-T, QSGMII link with the MAC, downshifting, HP Auto-MDIX
detection and blinking pattern for its 4 LEDs.
The GPIO register bank is a set of registers that are common to all
PHYs in the package. So any modification in any register of this bank
affects all PHYs of the package.
If the PHYs haven't been reset before booting the Linux kernel and were
configured to use interrupts for e.g. link status updates, it is
required to clear the interrupts mask register of all PHYs before being
able to use interrupts with any PHY. The first PHY of the package that
will be init will take care of clearing all PHYs interrupts mask
registers. Thus, we need to keep track of the init sequence in the
package, if it's already been done or if it's to be done.
Most of the init sequence of a PHY of the package is common to all PHYs
in the package, thus we use the SMI broadcast feature which enables us
to propagate a write in one register of one PHY to all PHYs in the same
package.
This patch series adds support for VSC8514 in Microsemi driver(mscc.c)
and removes support from Vitesse driver(vitesse.c).
v4
- mscc: Removed features settings
- mscc: Removed aneg_done settings.
v3
- mscc: Used BIT(x) for PHY_MCB_S6G_WRITE and PHY_MCB_S6G_READ
instead of hex.
- mscc: Replaced magic numbers with proper constants.
- mscc: Handled delays and timeouts at appropriate points.
- mscc: Added comments/explanation where requested.
v2
- mscc: Sorted variable declarations in reverse christmas tree order.
v1
- Added 0/2 file.
Kavya Sree (2):
net: phy: mscc: add support for VSC8514 PHY
net: phy: vitesse: Remove support for VSC8514
drivers/net/phy/Kconfig | 2 +-
drivers/net/phy/mscc.c | 426 ++++++++++++++++++++++++++++++++++++++
drivers/net/phy/vitesse.c | 12 --
3 files changed, 427 insertions(+), 13 deletions(-)
--
2.17.1
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