netdev - Re: [PATCH v3 bpf-next 08/19] bpf: insert explicit zero extension insn when hardware doesn't do it implicitly

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Message-Id: <1555322953.xj35xt2bjs.naveen@linux.ibm.com>
Date:   Mon, 15 Apr 2019 15:41:40 +0530
From:   "Naveen N. Rao" <naveen.n.rao@...ux.vnet.ibm.com>
To:     alexei.starovoitov@...il.com, daniel@...earbox.net,
        Jiong Wang <jiong.wang@...ronome.com>
Cc:     bpf@...r.kernel.org, netdev@...r.kernel.org,
        oss-drivers@...ronome.com
Subject: Re: [PATCH v3 bpf-next 08/19] bpf: insert explicit zero extension
 insn when hardware doesn't do it implicitly

Naveen N. Rao wrote:
>> It is then for all back-ends to decide how to use such information to
>> eliminate unnecessary zero extension code-gen during JIT compilation.
>> 
>> One approach is:
>>   1. Verifier insert explicit zero extension for those instructions that
>>      need zero extension.
>>   2. All JIT back-ends do NOT generate zero extension for sub-register
>>      write any more.
> 
> Is it possible to instead give a hint to the JIT back-ends on the 
> instructions needing zero-extension? That would help in case of 
> architectures that have single/more-optimal instruction for zero 
> extension, compared to having to emit 2 instructions with the current 
> approach.

I just noticed your discussion with Alexei on RFC v1 after posting this.  
I agree that this can be looked into subsequently -- either a new 
instruction, or detecting this during JIT.

- Naveen