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Message-ID: <alpine.DEB.2.21.1904180827440.3174@nanos.tec.linutronix.de>
Date: Thu, 18 Apr 2019 08:31:52 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Fenghua Yu <fenghua.yu@...el.com>
cc: Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
H Peter Anvin <hpa@...or.com>,
Paolo Bonzini <pbonzini@...hat.com>,
Dave Hansen <dave.hansen@...el.com>,
Ashok Raj <ashok.raj@...el.com>,
Peter Zijlstra <peterz@...radead.org>,
Ravi V Shankar <ravi.v.shankar@...el.com>,
Xiaoyao Li <xiaoyao.li@...el.com>,
Christopherson Sean J <sean.j.christopherson@...el.com>,
Kalle Valo <kvalo@...eaurora.org>,
Michael Chan <michael.chan@...adcom.com>,
linux-kernel <linux-kernel@...r.kernel.org>,
x86 <x86@...nel.org>, kvm@...r.kernel.org,
netdev@...r.kernel.org, linux-wireless@...r.kernel.org,
Xiaoyao Li <xiaoyao.li@...ux.intel.com>
Subject: Re: [PATCH v7 10/21] x86/split_lock: Define per CPU variable to
cache MSR TEST_CTL
On Wed, 17 Apr 2019, Fenghua Yu wrote:
> On Thu, Apr 18, 2019 at 12:14:12AM +0200, Thomas Gleixner wrote:
> > On Wed, 17 Apr 2019, Fenghua Yu wrote:
> > > +DEFINE_PER_CPU(u64, msr_test_ctl_cache);
> > > +EXPORT_PER_CPU_SYMBOL_GPL(msr_test_ctl_cache);
> >
> > Contrary to things like cpufeatures or MSR bits, it's pretty useless to
> > have a separate patch for this. Please fold this into the place which
> > actualy uses it.
>
> Can I fold this patch into the KVM patch 0013 which first uses (reads) the
> variable? But the variable will be set in later patches when enabling split
> lock feature (patch 0014) and when enabling/disabling split lock feature
> (patch 0015).
>
> Is this a right sequence to fit the variable in the patch set?
As I said in the other reply, you are assuming that the content of that MSR
is 0. Which might be true now, but is that true in a year from now?
So you really want to at least initialize the variable by reading the MSR
_before_ you make use of it in KVM.
Thanks,
tglx
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