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Date:   Mon, 22 Apr 2019 14:17:39 -0700
From:   Jakub Kicinski <jakub.kicinski@...ronome.com>
To:     Ido Schimmel <idosch@...lanox.com>
Cc:     "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "davem@...emloft.net" <davem@...emloft.net>,
        Jiri Pirko <jiri@...lanox.com>,
        Petr Machata <petrm@...lanox.com>,
        Alex Kushnarov <alexanderk@...lanox.com>,
        mlxsw <mlxsw@...lanox.com>
Subject: Re: [PATCH net-next 00/14] mlxsw: Shared buffer improvements

On Mon, 22 Apr 2019 12:08:38 +0000, Ido Schimmel wrote:
> This patchset includes two improvements with regards to shared buffer
> configuration in mlxsw.
> 
> The first part of this patchset forbids the user from performing illegal
> shared buffer configuration that can result in unnecessary packet loss.
> In order to better communicate these configuration failures to the user,
> extack is propagated from devlink towards drivers. This is done in
> patches #1-#8.
> 
> The second part of the patchset deals with the shared buffer
> configuration of the CPU port. When a packet is trapped by the device,
> it is sent across the PCI bus to the attached host CPU. From the
> device's perspective, it is as if the packet is transmitted through the
> CPU port.
> 
> While testing traffic directed at the CPU it became apparent that for
> certain packet sizes and certain burst sizes, the current shared buffer
> configuration of the CPU port is inadequate and results in packet drops.
> The configuration is adjusted by patches #9-#14 that create two new pools
> - ingress & egress - which are dedicated for CPU traffic.

Acked-by: Jakub Kicinski <jakub.kicinski@...ronome.com>

Out of curiosity - are you guys considering adding CPU flavour ports,
or is there a good reason not to have it exposed?

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