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Date:   Tue, 23 Apr 2019 12:32:22 +0200
From:   Linus Walleij <>
Cc:     linux-sunxi <>,
        Maxime Ripard <>,
        Chen-Yu Tsai <>, Rob Herring <>,
        David Airlie <>,
        Daniel Vetter <>,
        Mark Rutland <>,
        Giuseppe Cavallaro <>,
        Alexandre Torgue <>,
        Jose Abreu <>,
        "David S. Miller" <>,
        Maxime Coquelin <>,
        "open list:DRM PANEL DRIVERS" <>,
        Linux ARM <>,
        "" <>,
        netdev <>,,
        "open list:GPIO SUBSYSTEM" <>
Subject: Re: [PATCH v4 4/9] pinctrl: sunxi: Support I/O bias voltage setting
 on H6

On Sat, Apr 13, 2019 at 6:54 PM <> wrote:

> From: Ondrej Jirman <>
> H6 SoC has a "pio group withstand voltage mode" register (datasheet
> description), that needs to be used to select either 1.8V or 3.3V I/O mode,
> based on what voltage is powering the respective pin banks and is thus used
> for I/O signals.
> Add support for configuring this register according to the voltage of the
> pin bank regulator (if enabled).
> This is similar to the support for I/O bias voltage setting patch for A80
> and the same concerns apply. See:
>   commit 402bfb3c1352 ("Support I/O bias voltage setting on A80")
> Signed-off-by: Ondrej Jirman <>
> Acked-by: Maxime Ripard <>

This patch applied to the pinctrl tree for v5.2.

Linus Walleij

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