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Date:   Tue, 23 Apr 2019 09:31:40 -0700
From:   Jakub Kicinski <jakub.kicinski@...ronome.com>
To:     Jiri Pirko <jiri@...nulli.us>
Cc:     Ido Schimmel <idosch@...lanox.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "davem@...emloft.net" <davem@...emloft.net>,
        Jiri Pirko <jiri@...lanox.com>,
        Petr Machata <petrm@...lanox.com>,
        Alex Kushnarov <alexanderk@...lanox.com>,
        mlxsw <mlxsw@...lanox.com>
Subject: Re: [PATCH net-next 00/14] mlxsw: Shared buffer improvements

On Tue, 23 Apr 2019 09:28:02 +0200, Jiri Pirko wrote:
> Tue, Apr 23, 2019 at 07:26:06AM CEST, idosch@...lanox.com wrote:
> >On Mon, Apr 22, 2019 at 02:17:39PM -0700, Jakub Kicinski wrote:  
> >> Out of curiosity - are you guys considering adding CPU flavour ports,
> >> or is there a good reason not to have it exposed?  
> >
> >Yes, we are considering that. In fact, Alexander (Cc-ed) just asked me if
> >it is possible to monitor the occupancy in the egress CPU pool. This is
> >impossible without exposing the CPU port and it would have saved us a
> >lot of time while debugging these issues.
> >
> >Do you need this functionality for nfp as well? If so, do you have any
> >thoughts about it? My thinking is that it would be a devlink port
> >without a backing netdev.  
> 
> Similar to CPU port in DSA. It also does not have netdev associated with
> it. We can use the same port flavour:
> DEVLINK_PORT_FLAVOUR_CPU

Yup, to answer Ido's question - not really in nfp we are exposing PCIe
devices as full ports with netdevs because of multi-host and QoS
offloads.  So I never though too much about CPU ports, but for switches
they seem to make perfect sense :)

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