netdev - Re: [PATCH rdma-next 4/8] IB/mlx5: Add steering SW ICM device memory type

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Wed, 24 Apr 2019 16:25:16 +0300
From:   Leon Romanovsky <leon@...nel.org>
To:     Jason Gunthorpe <jgg@...pe.ca>
Cc:     Doug Ledford <dledford@...hat.com>,
        RDMA mailing list <linux-rdma@...r.kernel.org>,
        Ariel Levkovich <lariel@...lanox.com>,
        Eli Cohen <eli@...lanox.com>, Mark Bloch <markb@...lanox.com>,
        Saeed Mahameed <saeedm@...lanox.com>,
        linux-netdev <netdev@...r.kernel.org>
Subject: Re: [PATCH rdma-next 4/8] IB/mlx5: Add steering SW ICM device memory
 type

On Wed, Apr 24, 2019 at 10:14:05AM -0300, Jason Gunthorpe wrote:
> On Wed, Apr 24, 2019 at 04:12:22PM +0300, Leon Romanovsky wrote:
> > On Wed, Apr 24, 2019 at 10:04:40AM -0300, Jason Gunthorpe wrote:
> > > On Sun, Mar 31, 2019 at 07:44:46PM +0300, Leon Romanovsky wrote:
> > > > From: Ariel Levkovich <lariel@...lanox.com>
> > > >
> > > > This patch adds support for allocating, deallocating and registering
> > > > a new device memory type, STEERING_SW_ICM.
> > > > This memory can be allocated and used by a privileged user for direct
> > > > rule insertion and management of the device's steering tables.
> > > >
> > > > The type is provided by the user via the dedicated attribute in
> > > > the alloc_dm ioctl command.
> > > >
> > > > Signed-off-by: Ariel Levkovich <lariel@...lanox.com>
> > > > Reviewed-by: Eli Cohen <eli@...lanox.com>
> > > > Reviewed-by: Mark Bloch <markb@...lanox.com>
> > > > Signed-off-by: Leon Romanovsky <leonro@...lanox.com>
> > > >  drivers/infiniband/hw/mlx5/Kconfig        |   2 +-
> > > >  drivers/infiniband/hw/mlx5/cmd.c          | 127 +++++++++++++++++++-
> > > >  drivers/infiniband/hw/mlx5/cmd.h          |   6 +-
> > > >  drivers/infiniband/hw/mlx5/main.c         | 136 +++++++++++++++++++++-
> > > >  drivers/infiniband/hw/mlx5/mlx5_ib.h      |  17 +++
> > > >  drivers/infiniband/hw/mlx5/mr.c           |   7 ++
> > > >  include/uapi/rdma/mlx5_user_ioctl_verbs.h |   2 +
> > > >  7 files changed, 291 insertions(+), 6 deletions(-)
> > > >
> > > > diff --git a/drivers/infiniband/hw/mlx5/Kconfig b/drivers/infiniband/hw/mlx5/Kconfig
> > > > index 8d651c05de62..347d457fcb2f 100644
> > > > +++ b/drivers/infiniband/hw/mlx5/Kconfig
> > > > @@ -1,6 +1,6 @@
> > > >  config MLX5_INFINIBAND
> > > >  	tristate "Mellanox 5th generation network adapters (ConnectX series) support"
> > > > -	depends on NETDEVICES && ETHERNET && PCI && MLX5_CORE
> > > > +	depends on NETDEVICES && ETHERNET && PCI && MLX5_CORE && PHYS_ADDR_T_64BIT
> > >
> > > Why do we need this?
> >
> > We are using phys_addr_t type and not u64 as an input to FW to emphasize
> > the caller interface, but it is different between 32 and 64 bits systems.
> > Such PHYS_ADDR_T_64BIT will ensure that phys_addr_t will be always 64 bits.
>
> ???
>
> PHYS_ADDR_T should only ever be used to store a bus address - and if
> you are passing a bus address to/from FW then you 0 extend it on 32
> bit, and range check on 64 bit.
>
> This is not a reason to force PHYS_ADDR_T_64BIT from a driver

So how will I mark that we are forwarding physical address to FW?

Thanks

>
> Jason