netdev - RE: [PATCH net-next v3] ravb: Avoid unsupported internal delay mode for R-Car E3/D3

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Message-ID: <TY1PR01MB1770C460826708D039918F24C03C0@TY1PR01MB1770.jpnprd01.prod.outlook.com>
Date:   Wed, 24 Apr 2019 09:25:08 +0000
From:   Fabrizio Castro <fabrizio.castro@...renesas.com>
To:     Simon Horman <horms+renesas@...ge.net.au>,
        David Miller <davem@...emloft.net>,
        Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
CC:     Magnus Damm <magnus.damm@...il.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-renesas-soc@...r.kernel.org" 
        <linux-renesas-soc@...r.kernel.org>, Andrew Lunn <andrew@...n.ch>
Subject: RE: [PATCH net-next v3] ravb: Avoid unsupported internal delay mode
 for R-Car E3/D3

> From: linux-renesas-soc-owner@...r.kernel.org <linux-renesas-soc-owner@...r.kernel.org> On Behalf Of Simon Horman
> Sent: 23 April 2019 14:02
> Subject: [PATCH net-next v3] ravb: Avoid unsupported internal delay mode for R-Car E3/D3
> 
> According to the R-Car Gen3 Hardware Manual Rev 1.50 of Nov 30, 2018, the
> TX clock internal delay mode isn't supported on R-Car E3 (r8a77990) or D3
> (r8a77995). And by extension it is also not supported by RZ/G2E (r9a774c0).

s/ r9a774c0/ r8a774c0/g

Reviewed-by: Fabrizio Castro <fabrizio.castro@...renesas.com>

> 
> This matches all ES versions of the affected SoCs as it is
> not clear if this problem will be resolved in newer chips.
> This can be revisited, as necessary.
> 
> This patch does not error-out if PHY_INTERFACE_MODE_RGMII_ID or
> PHY_INTERFACE_MODE_RGMII_TXID are used on SoCs where TX clock delay
> mode is not supported as there is a risk of introducing a regression
> when used in conjunction with older DT blobs present in the field.
> Rather, a warning is logged in such cases.
> 
> Based on work by Kazuya Mizuguchi.
> 
> Signed-off-by: Simon Horman <horms+renesas@...ge.net.au>
> Reviewed-by: Andrew Lunn <andrew@...n.ch>
> ---
> v3
> * Log warning if unsupported phy-mode is used
> 
> v2
> * Dropped RFC designation
> * Also correct RZ/G2E (r8a774c0)
> * Remove revision (ES version) portion of soc match
>   as it is not clear this problem will be resolved in newer chips.
> * Refer to user manual v1.50 rather than errata for v1.00 in changelog
> * Note absence of error handling in Changelog
> ---
>  drivers/net/ethernet/renesas/ravb_main.c | 15 +++++++++++++--
>  1 file changed, 13 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c
> index 4f648394e645..9618c4881c83 100644
> --- a/drivers/net/ethernet/renesas/ravb_main.c
> +++ b/drivers/net/ethernet/renesas/ravb_main.c
> @@ -1969,6 +1969,13 @@ static void ravb_set_config_mode(struct net_device *ndev)
>  	}
>  }
> 
> +static const struct soc_device_attribute ravb_delay_mode_quirk_match[] = {
> +	{ .soc_id = "r8a774c0" },
> +	{ .soc_id = "r8a77990" },
> +	{ .soc_id = "r8a77995" },
> +	{ /* sentinel */ }
> +};
> +
>  /* Set tx and rx clock internal delay modes */
>  static void ravb_set_delay_mode(struct net_device *ndev)
>  {
> @@ -1980,8 +1987,12 @@ static void ravb_set_delay_mode(struct net_device *ndev)
>  		set |= APSR_DM_RDM;
> 
>  	if (priv->phy_interface == PHY_INTERFACE_MODE_RGMII_ID ||
> -	    priv->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID)
> -		set |= APSR_DM_TDM;
> +	    priv->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID) {
> +		if (!WARN(soc_device_match(ravb_delay_mode_quirk_match),
> +			  "phy-mode %s requires TX clock internal delay mode which is not supported by this hardware revision. Please
> update device tree",
> +			  phy_modes(priv->phy_interface)))
> +			set |= APSR_DM_TDM;
> +	}
> 
>  	ravb_modify(ndev, APSR, APSR_DM, set);
>  }
> --
> 2.11.0