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Message-ID: <AF233D1473C1364ABD51D28909A1B1B75C0B205D@pgsmsx114.gar.corp.intel.com>
Date:   Thu, 25 Apr 2019 14:39:06 +0000
From:   "Ong, Boon Leong" <boon.leong.ong@...el.com>
To:     Andrew Lunn <andrew@...n.ch>,
        "Voon, Weifeng" <weifeng.voon@...el.com>
CC:     "David S. Miller" <davem@...emloft.net>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "Kweh, Hock Leong" <hock.leong.kweh@...el.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        "Maxime Coquelin" <mcoquelin.stm32@...il.com>,
        Giuseppe Cavallaro <peppe.cavallaro@...com>,
        Jose Abreu <joabreu@...opsys.com>
Subject: RE: [PATCH 0/7] net: stmmac: enable EHL SGMII

>-----Original Message-----
>From: Andrew Lunn [mailto:andrew@...n.ch]
>Sent: Thursday, April 25, 2019 8:38 PM
>To: Voon, Weifeng <weifeng.voon@...el.com>
>Cc: David S. Miller <davem@...emloft.net>; netdev@...r.kernel.org; linux-
>kernel@...r.kernel.org; Ong, Boon Leong <boon.leong.ong@...el.com>;
>Kweh, Hock Leong <hock.leong.kweh@...el.com>; Florian Fainelli
><f.fainelli@...il.com>; Maxime Coquelin <mcoquelin.stm32@...il.com>;
>Giuseppe Cavallaro <peppe.cavallaro@...com>; Jose Abreu
><joabreu@...opsys.com>
>Subject: Re: [PATCH 0/7] net: stmmac: enable EHL SGMII
>
>On Thu, Apr 25, 2019 at 07:27:51AM +0000, Voon, Weifeng wrote:
>> > > This patch-set is to enable Ethernet controller (DW Ethernet QoS and
>> > > DW Ethernet PCS) with SGMII interface in Elkhart Lake.
>> >
>> > Can the hardware also do 1000BaseX?
>>
>> Yes, it is able to do 1000BaseX.
>
>I Voon
>
>That means you should not really hard code it to SGMII. Somebody is
>going to connect an SFP or an Ethernet switch and want to use
>1000BaseX.

Hi Andrew,

The Ethernet controller consists of two ways to connect to external PHY,
RGMII and SGMII. The selection is done through soft strap.
The patch-series is to enable SGMII interface. The DW xPCS IP is
configured to operate in 1000BASE-X mode. The xPCS IP is external
connected through internal PHY interface which presents externally
as SGMII interface. To help illustrate the connection:-

      <-----------------GBE Controller----------------->|<--External PHY chip-->

      +----------+                    +----+          +---+                          +-----------------+
      |   EQoS   | <-GMII->|xPCS|<--> | L1 | <-- SGMII --> | External GbE |
      |   MAC    |                 |         |       |PHY|                         | PHY Chip        |
      +----------+                    +----+          +---+                          +-----------------+
            
In future, we will submit the changes for the RGMII connection that
bypasses DW xPCS.  

Hope this help clarifies matter. 

>At minimum, please add support for phy-mode in the device tree.
>
>Also, when the adjust_link callback passed to phy_connect() is called,
>you can look at the interface type to know if you need to configure it
>to SGMII or 1000BaseX. A copper PHY in an SFP module generally wants
>SGMII, but an optical module wants 1000BaseX. But to properly support
>SPFs the driver needs to swap to phylink, rather than phylib.
>
>     Andrew

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