netdev - Re: [PATCH v3 net-next 14/15] net: aquantia: fixups on 64bit dma counters

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <14845b14-a05e-9c1c-b43b-7b9b70729808@aquantia.com>
Date:   Sat, 27 Apr 2019 06:28:12 +0000
From:   Igor Russkikh <Igor.Russkikh@...antia.com>
To:     Andrew Lunn <andrew@...n.ch>
CC:     "David S . Miller" <davem@...emloft.net>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        Nikita Danilov <Nikita.Danilov@...antia.com>,
        Dmitry Bogdanov <Dmitry.Bogdanov@...antia.com>
Subject: Re: [PATCH v3 net-next 14/15] net: aquantia: fixups on 64bit dma
 counters



On 27.04.2019 0:36, Andrew Lunn wrote:
>> +	self->curr_stats.dma_pkt_rc = hw_atl_stats_rx_dma_good_pkt_counterlsw_get(self) +
>> +				      ((u64)hw_atl_stats_rx_dma_good_pkt_countermsw_get(self) << 32);
> 
> Don't you need to do something to avoid issue with overflow from lsw
> into msw? I've often seen code get the msw, the lsw and then the msm
> again. If the two msw reads are different, it repeats it all again.

Hardware latches msw when host reads lsw register. So thats safe.

However looking into spec it says to always read lsw first.
The syntax above does not guarantee that in general.
I'll change that with something like

dma_pkt_rc = hw_atl_stats_rx_dma_good_pkt_counterlsw_get(self);
dma_pkt_rc |= ((u64)hw_atl_stats_rx_dma_good_pkt_countermsw_get(self) << 32);

Thanks for the note,

  Igor