lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Tue, 30 Apr 2019 18:59:31 +0200 From: Andrew Lunn <andrew@...n.ch> To: Esben Haabendal <esben@...nix.com> Cc: netdev@...r.kernel.org, "David S. Miller" <davem@...emloft.net>, Michal Simek <michal.simek@...inx.com>, YueHaibing <yuehaibing@...wei.com>, Luis Chamberlain <mcgrof@...nel.org>, Yang Wei <yang.wei9@....com.cn>, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org Subject: Re: [PATCH v3 07/12] net: ll_temac: Support indirect_mutex share within TEMAC IP On Tue, Apr 30, 2019 at 09:17:54AM +0200, Esben Haabendal wrote: > Indirect register access goes through a DCR bus bridge, which > allows only one outstanding transaction. And to make matters > worse, each TEMAC IP block contains two Ethernet interfaces, and > although they seem to have separate registers for indirect access, > they actually share the registers. Or to be more specific, MSW, LSW > and CTL registers are physically shared between Ethernet interfaces > in same TEMAC IP, with RDY register being (almost) specificic to > the Ethernet interface. The 0x10000 bit in RDY reflects combined > bus ready state though. > > So we need to take care to synchronize not only within a single > device, but also between devices in same TEMAC IP. > > This commit allows to do that with legacy platform devices. > > For OF devices, the xlnx,compound parent of the temac node should be > used to find siblings, and setup a shared indirect_mutex between them. > I will leave this work to somebody else, as I don't have hardware to > test that. No regression is introduced by that, as before this commit > using two Ethernet interfaces in same TEMAC block is simply broken. > > Signed-off-by: Esben Haabendal <esben@...nix.com> Reviewed-by: Andrew Lunn <andrew@...n.ch> Andrew
Powered by blists - more mailing lists