netdev - Re: [PATCH v8 13/15] x86/split_lock: Enable split lock detection by default

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Message-ID: <20190507204812.GC124959@romley-ivt3.sc.intel.com>
Date:   Tue, 7 May 2019 13:48:12 -0700
From:   Fenghua Yu <fenghua.yu@...el.com>
To:     Thomas Gleixner <tglx@...utronix.de>
Cc:     David Laight <David.Laight@...LAB.COM>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        H Peter Anvin <hpa@...or.com>,
        Paolo Bonzini <pbonzini@...hat.com>,
        Dave Hansen <dave.hansen@...el.com>,
        Ashok Raj <ashok.raj@...el.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Ravi V Shankar <ravi.v.shankar@...el.com>,
        Xiaoyao Li <xiaoyao.li@...el.com>,
        Christopherson Sean J <sean.j.christopherson@...el.com>,
        Kalle Valo <kvalo@...eaurora.org>,
        Michael Chan <michael.chan@...adcom.com>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        x86 <x86@...nel.org>,
        "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-wireless@...r.kernel.org" <linux-wireless@...r.kernel.org>
Subject: Re: [PATCH v8 13/15] x86/split_lock: Enable split lock detection by
 default

On Thu, Apr 25, 2019 at 12:58:32PM +0200, Thomas Gleixner wrote:
> On Thu, 25 Apr 2019, David Laight wrote:
> 
> > From:  Fenghua Yu
> > > Sent: 24 April 2019 20:33
> > > A split locked access locks bus and degrades overall memory access
> > > performance. When split lock detection feature is enumerated, enable
> > > the feature by default by writing 1 to bit 29 in MSR TEST_CTL to find
> > > any split lock issue.
> > 
> > You can't enable this by default until ALL the known potentially
> > misaligned locked memory operations have been fixed.
> 
> Errm? The result will be a WARN_ON() printed and no further damage. It's
> not making anything worse than it is now. In fact we just should add a
> 
>     WARN_ON_ONCE(!aligned_to_long(p)) to all the xxx_bit() operations.
> 
> so we catch them even when they do not trigger that #AC thingy.

I add WARN_ON_ONCE() in atomic xxx_bit(). But the code cannot be compiled.

Here is a simplified patch (only adding warning in set_bit()):

diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h
index 8e790ec219a5..bc889ac12e26 100644
--- a/arch/x86/include/asm/bitops.h
+++ b/arch/x86/include/asm/bitops.h
@@ -14,6 +14,8 @@
 #endif

 #include <linux/compiler.h>
+#include <linux/kernel.h>
+#include <asm-generic/bug.h>
 #include <asm/alternative.h>
 #include <asm/rmwcc.h>
 #include <asm/barrier.h>
@@ -67,6 +69,8 @@
 static __always_inline void
 set_bit(long nr, volatile unsigned long *addr)
 {
+       WARN_ON_ONCE(!IS_ALIGNED((unsigned long)addr, sizeof(unsigned long)));
+
        if (IS_IMMEDIATE(nr)) {
                asm volatile(LOCK_PREFIX "orb %1,%0"
                        : CONST_MASK_ADDR(nr, addr)

gcc reports errors:
  CC      kernel/bounds.s
  CALL    scripts/atomic/check-atomics.sh
In file included from ./include/linux/bitops.h:19,
                 from ./include/linux/kernel.h:12,
                 from ./include/asm-generic/bug.h:18,
                 from ./arch/x86/include/asm/bug.h:83,
                 from ./include/linux/bug.h:5,
                 from ./include/linux/page-flags.h:10,
                 from kernel/bounds.c:10:
./arch/x86/include/asm/bitops.h: In function ‘set_bit’:
./arch/x86/include/asm/bitops.h:72:2: error: implicit declaration of function ‘WARN_ON_ONCE’; did you mean ‘WRITE_ONCE’? [-Werror=implicit-function-declaration]
  WARN_ON_ONCE(!IS_ALIGNED((unsigned long)addr, sizeof(unsigned long)));
  ^~~~~~~~~~~~
./arch/x86/include/asm/bitops.h:72:16: error: implicit declaration of function ‘IS_ALIGNED’; did you mean ‘IS_ENABLED’? [-Werror=implicit-function-declaration]
  WARN_ON_ONCE(!IS_ALIGNED((unsigned long)addr, sizeof(unsigned long)));
                ^~~~~~~~~~
I think it's because arch/x86/include/asm/bitops.h is included in
include/linux/kernel.h before IS_ALIGNED() is defined and in
include/asm-generic/bug.h before WARN_ON_ONCE() is defined.

How to write a right warn patch and solve the compilation issue?

Thanks.

-Fenghua