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Date:   Wed, 15 May 2019 14:39:36 +0200
From:   Maxime Chevallier <maxime.chevallier@...tlin.com>
To:     Florian Fainelli <f.fainelli@...il.com>,
        Andrew Lunn <andrew@...n.ch>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Russell King <linux@...linux.org.uk>, netdev@...r.kernel.org,
        "thomas.petazzoni@...tlin.com" <thomas.petazzoni@...tlin.com>,
        Antoine Tenart <antoine.tenart@...tlin.com>,
        Heiner Kallweit <hkallweit1@...il.com>
Subject: dsa: using multi-gbps speeds on CPU port

Hello everyone,

I'm working on a setup where I have a 88e6390X DSA switch connected to
a CPU (an armada 8040) with 2500BaseX and RXAUI interfaces (we only use
one at a time).

I'm facing a limitation with the current way to represent that link,
where we use a fixed-link description in the CPU port, like this :

...
switch0: switch0@1 {
	...
	port@0 {
		reg = <0>;
		label = "cpu";
		ethernet = <&eth0>;
		phy-mode = "2500base-x";
		fixed-link {
			speed = <2500>;
			full-duplex;
		};
	};
};
...

In this scenario, the dsa core will try to create a PHY emulating the
fixed-link on the DSA port side. This can't work with link speeds above
1Gbps, since we don't have any emulation for these PHYs, which would be
using C45 MMDs.

We could add support to emulate these modes, but I think there were some
discussions about using phylink to support these higher speed fixed-link
modes, instead of using PHY emulation.

However using phylink in master DSA ports seems to be a bit tricky,
since master ports don't have a dedicated net_device, and instead
reference the CPU-side netdevice (if I understood correctly).

I'll be happy to help on that, but before prototyping anything, I wanted
to have your thougts on this, and see if you had any plans.

Thanks,

Maxime

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