netdev - Re: [PATCH net-next] net: stmmac: socfpga: add RMII phy mode

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Message-ID: <cbe79f88-2f4c-a5bc-7dcd-e1dac253a787@gmail.com>
Date:   Wed, 15 May 2019 09:18:15 -0700
From:   Florian Fainelli <f.fainelli@...il.com>
To:     Andrew Lunn <andrew@...n.ch>, Dinh Nguyen <dinguyen@...nel.org>
Cc:     netdev@...r.kernel.org, davem@...emloft.net, joabreu@...opsys.com,
        Wei Liang Lim <wei.liang.lim@...el.com>
Subject: Re: [PATCH net-next] net: stmmac: socfpga: add RMII phy mode

On 5/15/19 8:24 AM, Andrew Lunn wrote:
>> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
>> @@ -251,6 +251,9 @@ static int socfpga_dwmac_set_phy_mode(struct socfpga_dwmac *dwmac)
>>  	case PHY_INTERFACE_MODE_SGMII:
>>  		val = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII;
>>  		break;
>> +	case PHY_INTERFACE_MODE_RMII:
>> +		val = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII;
>> +		break;
> 
> What about PHY_INTERFACE_MODE_RMII_ID, PHY_INTERFACE_MODE_RMII_RXID,
> PHY_INTERFACE_MODE_RMII_TXID?

RMII is reduced MII not Reduced Gigabit MII (RGMII), which still
operates at MII speed, therefore no concept of internal deal for RX/TX
data lines, the change looks fine to me.
-- 
Florian