netdev - Re: [PATCH net-next 2/2] net: phy: aquantia: add USXGMII support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Thu, 23 May 2019 06:08:42 +0200
From:   Heiner Kallweit <hkallweit1@...il.com>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Madalin-cristian Bucur <madalin.bucur@....com>,
        Shawn Guo <shawnguo@...nel.org>, Li Yang <leoyang.li@....com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Florian Fainelli <f.fainelli@...il.com>,
        David Miller <davem@...emloft.net>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: Re: [PATCH net-next 2/2] net: phy: aquantia: add USXGMII support

On 22.05.2019 22:58, Andrew Lunn wrote:
> On Wed, May 22, 2019 at 09:58:32PM +0200, Heiner Kallweit wrote:
>> So far we didn't support mode USXGMII, and in order to not break the
>> two Freescale boards mode XGMII was accepted for the AQR107 family
>> even though it doesn't support XGMII. Add USXGMII support to the
>> Aquantia PHY driver and change the phy connection type for the two
>> boards.
>>
>> As an additional note: Even though the handle is named aqr106
>> there seem to be LS1046A boards with an AQR107.
>>
>> Signed-off-by: Heiner Kallweit <hkallweit1@...il.com>
>> ---
>>  arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 2 +-
>>  arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 2 +-
>>  drivers/net/phy/aquantia_main.c                   | 6 +++++-
>>  3 files changed, 7 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
>> index 4223a2352..c2ce1a611 100644
>> --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
>> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
>> @@ -139,7 +139,7 @@
>>  
>>  	ethernet@...00 { /* 10GEC1 */
>>  		phy-handle = <&aqr105_phy>;
>> -		phy-connection-type = "xgmii";
>> +		phy-connection-type = "usxgmii";
>>  	};
>>  
>>  	mdio@...00 {
>> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
>> index 6a6514d0e..f927a8a25 100644
>> --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
>> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
>> @@ -147,7 +147,7 @@
>>  
>>  	ethernet@...00 { /* 10GEC1 */
>>  		phy-handle = <&aqr106_phy>;
>> -		phy-connection-type = "xgmii";
>> +		phy-connection-type = "usxgmii";
>>  	};
>>  
>>  	ethernet@...00 { /* 10GEC2 */
>> diff --git a/drivers/net/phy/aquantia_main.c b/drivers/net/phy/aquantia_main.c
>> index 0fedd28fd..3f24c42a8 100644
>> @@ -487,7 +491,7 @@ static int aqr107_config_init(struct phy_device *phydev)
>>  	/* Check that the PHY interface type is compatible */
>>  	if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
>>  	    phydev->interface != PHY_INTERFACE_MODE_2500BASEX &&
>> -	    phydev->interface != PHY_INTERFACE_MODE_XGMII &&
>> +	    phydev->interface != PHY_INTERFACE_MODE_USXGMII &&
>>  	    phydev->interface != PHY_INTERFACE_MODE_10GKR)
>>  		return -ENODEV;
> 
> Hi Heiner
> 
> Just to reiterate Florian's point. We need to be careful with device
> tree blobs. We should try not to break them, at least not for a few
> cycles.
> 
> I would much prefer to see a
> 
> WARN_ON(phydev->interface == PHY_INTERFACE_MODE_XGMII,
>         "Your devicetree is out of date, please update it");
> 
> and accept XGMII for this cycle. These are development boards, so in
> theory users are developers, so should know how to update the DT.
> 
I see your point. Then I'll just change phylib and will let the NXP
guys change the board DTS.

>     Andrew
> 
Heiner