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Message-ID: <CAJ+HfNg_yiVTt4Y+sqs2YFW4rYPkTvcFjKyAAgOxZZR5uxfzzQ@mail.gmail.com>
Date:   Fri, 24 May 2019 19:16:39 +0200
From:   Björn Töpel <bjorn.topel@...il.com>
To:     Jiong Wang <jiong.wang@...ronome.com>
Cc:     Alexei Starovoitov <alexei.starovoitov@...il.com>,
        Daniel Borkmann <daniel@...earbox.net>,
        bpf <bpf@...r.kernel.org>, Netdev <netdev@...r.kernel.org>,
        oss-drivers@...ronome.com, David Miller <davem@...emloft.net>,
        paul.burton@...s.com, udknight@...il.com, zlim.lnx@...il.com,
        illusionist.neo@...il.com, naveen.n.rao@...ux.ibm.com,
        sandipan@...ux.ibm.com, schwidefsky@...ibm.com,
        heiko.carstens@...ibm.com,
        Jakub Kicinski <jakub.kicinski@...ronome.com>
Subject: Re: [PATCH v8 bpf-next 15/16] riscv: bpf: eliminate zero extension code-gen

On Fri, 24 May 2019 at 18:36, Jiong Wang <jiong.wang@...ronome.com> wrote:
>
[...]
> > Hmm, missing is64 check here (fall-through for 64-bit movs)?
>
> (re-send because of bouncing back)
>
> FOR BPF_X form, when imm == 1, it is a special mov32 constructed by
> verifier, it can only be BPF_ALU, not BPF_ALU64. And it is used for
> instructing JIT back-end to do unconditional zero extension.
>
> Please see patch 3 description for the explanation.
>

Doh! Thanks.


Björn

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