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Message-ID: <4cd0770d-5eca-a153-1ed3-32472a1a8860@gmail.com>
Date: Fri, 24 May 2019 19:24:08 +0200
From: Heiner Kallweit <hkallweit1@...il.com>
To: Max Uvarov <muvarov@...il.com>, netdev@...r.kernel.org
Cc: andrew@...n.ch, f.fainelli@...il.com, davem@...emloft.net
Subject: Re: [PATCH 2/3] net:phy:dp83867: increase SGMII autoneg timer
duration
On 24.05.2019 12:25, Max Uvarov wrote:
> After reset SGMII Autoneg timer is set to 2us (bits 6 and 5 are 01).
> That us not enough to finalize autonegatiation on some devices.
> Increase this timer duration to maximum supported 16ms.
>
> Signed-off-by: Max Uvarov <muvarov@...il.com>
> ---
> drivers/net/phy/dp83867.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
> index afd31c516cc7..66b0a09ad094 100644
> --- a/drivers/net/phy/dp83867.c
> +++ b/drivers/net/phy/dp83867.c
> @@ -297,6 +297,19 @@ static int dp83867_config_init(struct phy_device *phydev)
> WARN_ONCE(1, "dp83867: err DP83867_10M_SGMII_CFG\n");
> return ret;
> }
> +
> + /* After reset SGMII Autoneg timer is set to 2us (bits 6 and 5
> + * are 01). That us not enough to finalize autoneg on some
> + * devices. Increase this timer duration to maximum 16ms.
> + */
In the public datasheet the bits are described as reserved. However, based on
the value, I suppose it's not a timer value but the timer resolution.
> + val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4);
> + val &= ~(BIT(5) | BIT(6));
> + ret = phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4, val);
> + if (ret) {
> + WARN_ONCE(1, "dp83867: error config sgmii auto-neg timer\n");
> + return ret;
Same comment as for patch 1.
> + }
> +
> }
>
> /* Enable Interrupt output INT_OE in CFG3 register */
>
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