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Message-ID: <20190524135752.GD17138@t480s.localdomain>
Date: Fri, 24 May 2019 13:57:52 -0400
From: Vivien Didelot <vivien.didelot@...il.com>
To: Rasmus Villemoes <rasmus.villemoes@...vas.dk>
Cc: Andrew Lunn <andrew@...n.ch>,
Florian Fainelli <f.fainelli@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Rasmus Villemoes <Rasmus.Villemoes@...vas.se>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 2/5] net: dsa: prepare mv88e6xxx_g1_atu_op() for the
mv88e6250
On Fri, 24 May 2019 09:00:26 +0000, Rasmus Villemoes <rasmus.villemoes@...vas.dk> wrote:
> All the currently supported chips have .num_databases either 256 or
> 4096, so this patch does not change behaviour for any of those. The
> mv88e6250, however, has .num_databases == 64, and it does not put the
> upper two bits in ATU control 13:12, but rather in ATU Operation
> 9:8. So change the logic to prepare for supporting mv88e6250.
>
> Reviewed-by: Andrew Lunn <andrew@...n.ch>
> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@...vas.dk>
Reviewed-by: Vivien Didelot <vivien.didelot@...il.com>
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