[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <1559347395-14058-7-git-send-email-sean.wang@mediatek.com>
Date: Sat, 1 Jun 2019 08:03:15 +0800
From: <sean.wang@...iatek.com>
To: <john@...ozen.org>, <davem@...emloft.net>
CC: <nbd@...nwrt.org>, <netdev@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-mediatek@...ts.infradead.org>,
Sean Wang <sean.wang@...iatek.com>
Subject: [PATCH net-next v1 6/6] arm64: dts: mt7622: Enlarge the SGMII register range
From: Sean Wang <sean.wang@...iatek.com>
Enlarge the SGMII register range and using 2.5G force mode on default.
Signed-off-by: Sean Wang <sean.wang@...iatek.com>
---
arch/arm64/boot/dts/mediatek/mt7622.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
index 4b1f5ae710eb..d1e13d340e26 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -929,7 +929,8 @@
sgmiisys: sgmiisys@...28000 {
compatible = "mediatek,mt7622-sgmiisys",
"syscon";
- reg = <0 0x1b128000 0 0x1000>;
+ reg = <0 0x1b128000 0 0x3000>;
#clock-cells = <1>;
+ mediatek,physpeed = "2500";
};
};
--
2.17.1
Powered by blists - more mailing lists