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Message-ID: <20190603151606.GG19627@lunn.ch>
Date: Mon, 3 Jun 2019 17:16:06 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Rasmus Villemoes <rasmus.villemoes@...vas.dk>
Cc: Vivien Didelot <vivien.didelot@...il.com>,
Florian Fainelli <f.fainelli@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Rasmus Villemoes <Rasmus.Villemoes@...vas.se>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH net-next v3 08/10] net: dsa: mv88e6xxx: add support for
mv88e6250
> The chip has four per port 16-bits statistics registers, two of which
> correspond to the existing "sw_in_filtered" and "sw_out_filtered" (but
> at offsets 0x13 and 0x10 rather than 0x12 and 0x13, because why should
> this be easy...).
This is Marvell. Nothing is easy, they keep making subtle changes like
this.
> Wiring up those four statistics seems to require
> introducing a STATS_TYPE_PORT_6250 bit or similar, which seems a tad
> ugly, so for now this just allows access to the STATS_TYPE_BANK0 ones.
I don't think it will be too ugly. We have the abstraction in place to
support it. So feel free to add a follow up patch adding these
statistics if you want.
> The chip does have ptp support, and the existing
> mv88e6352_{gpio,avb,ptp}_ops at first glance seem like they would work
> out-of-the-box, but for simplicity (and lack of testing) I'm eliding
> this.
Fine, you can add this later, if you do get a test system.
Reviewed-by: Andrew Lunn <andrew@...n.ch>
Andrew
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