netdev - Re: [PATCH net-next v2] net: phy: xilinx: add Xilinx PHY driver

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20190603162745.00007313@intel.com>
Date:   Mon, 3 Jun 2019 16:27:45 -0700
From:   Jesse Brandeburg <jesse.brandeburg@...el.com>
To:     Robert Hancock <hancock@...systems.ca>
Cc:     <netdev@...r.kernel.org>, jesse.brandeburg@...el.com
Subject: Re: [PATCH net-next v2] net: phy: xilinx: add Xilinx PHY driver

On Mon, 3 Jun 2019 17:12:04 -0600
Robert Hancock <hancock@...systems.ca> wrote:

> This adds a driver for the PHY device implemented in the Xilinx PCS/PMA
> Core logic. This is mostly a generic gigabit PHY, except that the
> features are explicitly set because the PHY wrongly indicates it has no
> extended status register when it actually does.
> 
> This version is a simplified version of the GPL 2+ version from the
> Xilinx kernel tree.
> 
> Signed-off-by: Robert Hancock <hancock@...systems.ca>
> ---
> 
> Differences from v1:
> -Removed unnecessary config_init method
> -Added comment to explain why features are explicitly set
> 
>  drivers/net/phy/Kconfig  |  6 ++++++
>  drivers/net/phy/Makefile |  1 +
>  drivers/net/phy/xilinx.c | 51 ++++++++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 58 insertions(+)
>  create mode 100644 drivers/net/phy/xilinx.c
> 

Seems fine.

Reviewed-by: Jesse Brandeburg <jesse.brandeburg@...el.com>