netdev - Re: [PATCH v2 5/5] net: dsa: add support for mv88e6250

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <b05a12b8-fe03-e3c4-dbf0-ca29c1931e54@prevas.dk>
Date:   Mon, 3 Jun 2019 08:52:38 +0000
From:   Rasmus Villemoes <rasmus.villemoes@...vas.dk>
To:     Andrew Lunn <andrew@...n.ch>
CC:     Vivien Didelot <vivien.didelot@...il.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Rasmus Villemoes <Rasmus.Villemoes@...vas.se>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 5/5] net: dsa: add support for mv88e6250

On 24/05/2019 16.27, Andrew Lunn wrote:
>> @@ -4841,6 +4910,10 @@ static const struct of_device_id mv88e6xxx_of_match[] = {
>>  		.compatible = "marvell,mv88e6190",
>>  		.data = &mv88e6xxx_table[MV88E6190],
>>  	},
>> +	{
>> +		.compatible = "marvell,mv88e6250",
>> +		.data = &mv88e6xxx_table[MV88E6250],
>> +	},
>>  	{ /* sentinel */ },
>>  };
> 
> Ah, yes. I had not thought about that. A device at address 0 would be
> found, but a device at address 16 would be missed.

Eh, no? The port registers are at offset 0x8, i.e. at either SMI address
8 or 24, so I don't think a 6250 at address 0 could be detected using
either of the existing families?

> Please add this compatible string to Documentation/devicetree/bindings/net/dsa/marvell.txt 

Will do.

>> +++ b/drivers/net/dsa/mv88e6xxx/global1.c
>> @@ -182,6 +182,25 @@ int mv88e6185_g1_reset(struct mv88e6xxx_chip *chip)
>>  	return mv88e6185_g1_wait_ppu_polling(chip);
>>  }
>>  
>> +int mv88e6250_g1_reset(struct mv88e6xxx_chip *chip)
>> +{
>> +	u16 val;
>> +	int err;
>> +
>> +	/* Set the SWReset bit 15 */
>> +	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_CTL1, &val);
>> +	if (err)
>> +		return err;
>> +
>> +	val |= MV88E6XXX_G1_CTL1_SW_RESET;
>> +
>> +	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val);
>> +	if (err)
>> +		return err;
>> +
>> +	return mv88e6xxx_g1_wait_init_ready(chip);
>> +}
> 
> It looks like you could refactor mv88e6352_g1_reset() to call
> this function, and then mv88e6352_g1_wait_ppu_polling(chip);

Yes, I actually deliberately moved the 6250 reset function further up in
v2 to allow that. I'll add that refactoring as a separate patch.

Thanks,
Rasmus