netdev - Re: [PATCH net-next v2] net: phy: xilinx: add Xilinx PHY driver

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Message-ID: <20190604165452.GU19627@lunn.ch>
Date:   Tue, 4 Jun 2019 18:54:52 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Robert Hancock <hancock@...systems.ca>
Cc:     Heiner Kallweit <hkallweit1@...il.com>, netdev@...r.kernel.org,
        Florian Fainelli <f.fainelli@...il.com>
Subject: Re: [PATCH net-next v2] net: phy: xilinx: add Xilinx PHY driver

> So it seems like what is missing is the ability of genphy_config_init to
> detect the bits in the extended status register for 1000Base-X and add
> the corresponding mode flags. It appears bit 15 for 1000Base-X full
> duplex is standardized in 802.3 Clause 22, so I would expect Linux
> should be able to detect that and add it as a supported mode for the
> PHY. genphy_config_init is dealing with the "legacy" 32-bit mode masks
> that have no bit for 1000BaseX though.. how is that intended to work?

Hi Robert

I think you are looking at an old genphy_config_init(). The u32 has
been replaced. Adding:

#define ESTATUS_1000_XFULL      0x8000  /* Can do 1000BX Full          */
#define ESTATUS_1000_XHALF      0x4000  /* Can do 1000BT Half          */

and

                if (val & ESTATUS_1000_XFULL)
                        linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
                                         features);

should not be a problem.

       Andrew