[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CA+h21hpS=1Xq3y0C79KEZV9EX3g+aRm4c9NkCwiD7vDhyTwi=w@mail.gmail.com>
Date: Fri, 7 Jun 2019 12:43:05 +0300
From: Vladimir Oltean <olteanv@...il.com>
To: Richard Cochran <richardcochran@...il.com>
Cc: David Miller <davem@...emloft.net>,
Florian Fainelli <f.fainelli@...il.com>,
Vivien Didelot <vivien.didelot@...il.com>,
Andrew Lunn <andrew@...n.ch>,
John Stultz <john.stultz@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Stephen Boyd <sboyd@...nel.org>,
lkml <linux-kernel@...r.kernel.org>,
netdev <netdev@...r.kernel.org>
Subject: Re: [PATCH v3 net-next 00/17] PTP support for the SJA1105 DSA driver
On Fri, 7 Jun 2019 at 06:32, Richard Cochran <richardcochran@...il.com> wrote:
>
> On Thu, Jun 06, 2019 at 04:40:19PM +0300, Vladimir Oltean wrote:
> > Plain and simply because it doesn't work very well.
> > Even phc2sys from the system clock to the hardware (no timestamps
> > involved) has trouble staying put (under 1000 ns offset).
> > And using the hardware-corrected timestamps triggers a lot of clockchecks.
>
> It sounds like a bug in reading or adjusting the HW clock. Is the HW
> clock stable when you don't adjust its frequency?
How can I tell that for sure?
>
> Thanks,
> Richard
Powered by blists - more mailing lists