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Message-ID: <20190623150902.GB28942@lunn.ch>
Date:   Sun, 23 Jun 2019 17:09:02 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Parshuram Thombare <pthombar@...ence.com>
Cc:     nicolas.ferre@...rochip.com, davem@...emloft.net,
        f.fainelli@...il.com, linux@...linux.org.uk,
        netdev@...r.kernel.org, hkallweit1@...il.com,
        linux-kernel@...r.kernel.org, rafalc@...ence.com,
        aniljoy@...ence.com, piotrs@...ence.com
Subject: Re: [PATCH v4 4/5] net: macb: add support for high speed interface

> +enum {
> +	HS_MAC_SPEED_100M,
> +	HS_MAC_SPEED_1000M,
> +	HS_MAC_SPEED_2500M,
> +	HS_MAC_SPEED_5000M,
> +	HS_MAC_SPEED_10000M,
> +	HS_MAC_SPEED_25000M,
> +};
> +
> +enum {
> +	MACB_SERDES_RATE_5_PT_15625Gbps = 5,
> +	MACB_SERDES_RATE_10_PT_3125Gbps = 10,
> +};

What do the units mean here? Why would you clock the SERDES at 15Tbps,
or 3Tbps? 3.125Mbps would give you 2.5Gbps when using 8b/10b encoding.

> +	if (bp->phy_interface == PHY_INTERFACE_MODE_USXGMII) {
> +		switch (bp->serdes_rate) {
> +		case MACB_SERDES_RATE_5_PT_15625Gbps:
> +			rate = 78125000;
> +			break;
> +		case MACB_SERDES_RATE_10_PT_3125Gbps:
> +			rate = 156250000;
> +			break;
> +		default:
> +			return;
> +		}

Xilinx documentation:
https://www.xilinx.com/support/documentation/ip_documentation/usxgmii/v1_1/pg251-usxgmii.pdf
seems to suggest USXGMII uses a fixed rate of 10.3125Gb/s. So why do
you need to change the rate?

    Andrew

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