[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20190624135105.15579-3-tranmanphong@gmail.com>
Date: Mon, 24 Jun 2019 20:50:52 +0700
From: Phong Tran <tranmanphong@...il.com>
To: tranmanphong@...il.com
Cc: acme@...nel.org, alexander.shishkin@...ux.intel.com,
alexander.sverdlin@...il.com, allison@...utok.net, andrew@...n.ch,
ast@...nel.org, bgolaszewski@...libre.com, bpf@...r.kernel.org,
daniel@...earbox.net, daniel@...que.org, dmg@...ingmachine.org,
festevam@...il.com, gerg@...inux.org, gregkh@...uxfoundation.org,
gregory.clement@...tlin.com, haojian.zhuang@...il.com,
hsweeten@...ionengravers.com, illusionist.neo@...il.com,
info@...ux.net, jason@...edaemon.net, jolsa@...hat.com,
kafai@...com, kernel@...gutronix.de, kgene@...nel.org,
krzk@...nel.org, kstewart@...uxfoundation.org,
linux-arm-kernel@...ts.infradead.org, linux-imx@....com,
linux-kernel@...r.kernel.org, linux-omap@...r.kernel.org,
linux-samsung-soc@...r.kernel.org, linux@...linux.org.uk,
liviu.dudau@....com, lkundrak@...sk, lorenzo.pieralisi@....com,
mark.rutland@....com, mingo@...hat.com, namhyung@...nel.org,
netdev@...r.kernel.org, nsekhar@...com, peterz@...radead.org,
robert.jarzmik@...e.fr, s.hauer@...gutronix.de,
sebastian.hesselbarth@...il.com, shawnguo@...nel.org,
songliubraving@...com, sudeep.holla@....com, swinslow@...il.com,
tglx@...utronix.de, tony@...mide.com, will@...nel.org, yhs@...com
Subject: [PATCH V2 02/15] ARM: davinci: cleanup cppcheck shifting errors
[arch/arm/mach-davinci/cpuidle.c:41]: (error) Shifting signed 32-bit
value by 31 bits is undefined behaviour
[arch/arm/mach-davinci/cpuidle.c:43]: (error) Shifting signed 32-bit
value by 31 bits is undefined behaviour
Signed-off-by: Phong Tran <tranmanphong@...il.com>
---
arch/arm/mach-davinci/ddr2.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-davinci/ddr2.h b/arch/arm/mach-davinci/ddr2.h
index 4f7d7824b0c9..f2f56d16d7d5 100644
--- a/arch/arm/mach-davinci/ddr2.h
+++ b/arch/arm/mach-davinci/ddr2.h
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0 */
#define DDR2_SDRCR_OFFSET 0xc
-#define DDR2_SRPD_BIT (1 << 23)
-#define DDR2_MCLKSTOPEN_BIT (1 << 30)
-#define DDR2_LPMODEN_BIT (1 << 31)
+#define DDR2_SRPD_BIT BIT(23)
+#define DDR2_MCLKSTOPEN_BIT BIT(30)
+#define DDR2_LPMODEN_BIT BIT(31)
--
2.11.0
Powered by blists - more mailing lists