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Message-Id: <20190627.111746.1633047892796421451.davem@davemloft.net>
Date:   Thu, 27 Jun 2019 11:17:46 -0700 (PDT)
From:   David Miller <davem@...emloft.net>
To:     chunkeey@...il.com
Cc:     netdev@...r.kernel.org, mark.rutland@....com, robh+dt@...nel.org,
        f.fainelli@...il.com, vivien.didelot@...il.com, andrew@...n.ch
Subject: Re: [PATCH v1 2/2] net: dsa: qca8k: introduce reset via gpio
 feature

From: Christian Lamparter <chunkeey@...il.com>
Date: Tue, 25 Jun 2019 10:41:51 +0200

> The QCA8337(N) has a RESETn signal on Pin B42 that
> triggers a chip reset if the line is pulled low.
> The datasheet says that: "The active low duration
> must be greater than 10 ms".
> 
> This can hopefully fix some of the issues related
> to pin strapping in OpenWrt for the EA8500 which
> suffers from detection issues after a SoC reset.
> 
> Please note that the qca8k_probe() function does
> currently require to read the chip's revision
> register for identification purposes.
> 
> Signed-off-by: Christian Lamparter <chunkeey@...il.com>

Applied.

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