netdev - Re: [PATCH v2 net-next 1/2] net: mvpp2: implement RXAUI support

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Message-ID: <20190809080638.GA3516@kwain>
Date:   Fri, 9 Aug 2019 10:06:38 +0200
From:   Antoine Tenart <antoine.tenart@...tlin.com>
To:     Matt Pelland <mpelland@...rry.com>
Cc:     netdev@...r.kernel.org, maxime.chevallier@...tlin.com,
        antoine.tenart@...tlin.com
Subject: Re: [PATCH v2 net-next 1/2] net: mvpp2: implement RXAUI support

Hello Matt,

On Thu, Aug 08, 2019 at 07:06:05PM -0400, Matt Pelland wrote:
>  
> +static void mvpp22_gop_init_rxaui(struct mvpp2_port *port)
> +{
> +	struct mvpp2 *priv = port->priv;
> +	void __iomem *xpcs;
> +	u32 val;
> +
> +	xpcs = priv->iface_base + MVPP22_XPCS_BASE(port->gop_id);
> +
> +	val = readl(xpcs + MVPP22_XPCS_CFG0);
> +	val &= ~MVPP22_XPCS_CFG0_RESET_DIS;
> +	writel(val, xpcs + MVPP22_XPCS_CFG0);

The reset logic of the various blocks in PPv2 is handled outside of the
GoP init functions. You should only modify the XPCS configuration here,
without taking care of the reset. See mvpp22_pcs_reset_assert() and
mvpp22_pcs_reset_deassert().

Note that gop_init() is always called with the XPCS reset asserted.

>  static void mvpp22_gop_init_10gkr(struct mvpp2_port *port)
>  {
>  	struct mvpp2 *priv = port->priv;
> @@ -1065,6 +1089,9 @@ static int mvpp22_gop_init(struct mvpp2_port *port)
>  	case PHY_INTERFACE_MODE_2500BASEX:
>  		mvpp22_gop_init_sgmii(port);
>  		break;
> +	case PHY_INTERFACE_MODE_RXAUI:
> +		mvpp22_gop_init_rxaui(port);
> +		break;

Isn't RXAUI only supported on port #0? (Such as the 10GKR mode below).

>  	case PHY_INTERFACE_MODE_10GKR:
>  		if (port->gop_id != 0)
>  			goto invalid_conf;


>  		   MVPP22_XLG_CTRL4_EN_IDLE_CHECK);
>  	ctrl4 |= MVPP22_XLG_CTRL4_FWD_FC | MVPP22_XLG_CTRL4_FWD_PFC;
>  
> +	if (state->interface == PHY_INTERFACE_MODE_RXAUI)
> +		ctrl4 |= MVPP22_XLG_CTRL4_USE_XPCS;

You should probably mask MVPP22_XLG_CTRL4_USE_XPCS when the interface
isn't RXAUI (just to be consistent with what's done in the configuration
functions). You can do this a few lines before, some bits of ctrl4 get
masked.

Thanks!
Antoine

-- 
Antoine Ténart, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com