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Message-ID: <20190822173846.GA24020@sirena.co.uk>
Date: Thu, 22 Aug 2019 18:38:46 +0100
From: Mark Brown <broonie@...nel.org>
To: Vladimir Oltean <olteanv@...il.com>
Cc: h.feurstein@...il.com, mlichvar@...hat.com,
richardcochran@...il.com, andrew@...n.ch, f.fainelli@...il.com,
linux-spi@...r.kernel.org, netdev@...r.kernel.org
Subject: Re: [PATCH spi for-5.4 3/5] spi: spi-fsl-dspi: Use poll mode in case
the platform IRQ is missing
On Sun, Aug 18, 2019 at 09:25:58PM +0300, Vladimir Oltean wrote:
> On platforms like LS1021A which use TCFQ mode, an interrupt needs to be
> processed after each byte is TXed/RXed. I tried to make the DSPI
> implementation on this SoC operate in other, more efficient modes (EOQ,
> DMA) but it looks like it simply isn't possible.
This doesn't apply against current code (I guess due to your cleanup
series), please check and resend.
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