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Message-Id: <1566869891-29239-1-git-send-email-weifeng.voon@intel.com>
Date: Tue, 27 Aug 2019 09:38:07 +0800
From: Voon Weifeng <weifeng.voon@...el.com>
To: "David S. Miller" <davem@...emloft.net>,
Maxime Coquelin <mcoquelin.stm32@...il.com>
Cc: netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
Jose Abreu <joabreu@...opsys.com>,
Giuseppe Cavallaro <peppe.cavallaro@...com>,
Andrew Lunn <andrew@...n.ch>,
Alexandre Torgue <alexandre.torgue@...com>,
Ong Boon Leong <boon.leong.ong@...el.com>,
Voon Weifeng <weifeng.voon@...el.com>
Subject: [PATCH v1 net-next 0/4] Add EHL and TGL PCI info and PCI ID
In order to keep PCI info simple and neat, this patch series have
introduced a 3 hierarchy of struct. First layer will be the
intel_mgbe_common_data struct which keeps all Intel common configuration.
Second layer will be xxx_common_data which keeps all the different Intel
microarchitecture, e.g tgl, ehl. The third layer will be configuration
that tied to the PCI ID only based on speed and RGMII/SGMII interface.
EHL and TGL will also having a higher system clock which is 200Mhz.
Voon Weifeng (4):
net: stmmac: add EHL SGMII 1Gbps PCI info and PCI ID
net: stmmac: add TGL SGMII 1Gbps PCI info and PCI ID
net: stmmac: add EHL RGMII 1Gbps PCI info and PCI ID
net: stmmac: setup higher frequency clk support for EHL & TGL
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c | 172 +++++++++++++++++++++++
drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c | 3 +
include/linux/stmmac.h | 1 +
3 files changed, 176 insertions(+)
--
1.9.1
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