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Message-ID: <82f5e6c9-7a6d-7fa8-daa7-15e37daf216a@iogearbox.net>
Date:   Mon, 26 Aug 2019 23:34:58 +0200
From:   Daniel Borkmann <daniel@...earbox.net>
To:     Jakub Kicinski <jakub.kicinski@...ronome.com>,
        alexei.starovoitov@...il.com
Cc:     bpf@...r.kernel.org, netdev@...r.kernel.org,
        oss-drivers@...ronome.com, Jiong Wang <jiong.wang@...ronome.com>
Subject: Re: [PATCH bpf] nfp: bpf: fix latency bug when updating stack index
 register

On 8/24/19 4:00 AM, Jakub Kicinski wrote:
> From: Jiong Wang <jiong.wang@...ronome.com>
> 
> NFP is using Local Memory to model stack. LM_addr could be used as base of
> a 16 32-bit word region of Local Memory. Then, if the stack offset is
> beyond the current region, the local index needs to be updated. The update
> needs at least three cycles to take effect, therefore the sequence normally
> looks like:
> 
>    local_csr_wr[ActLMAddr3, gprB_5]
>    nop
>    nop
>    nop
> 
> If the local index switch happens on a narrow loads, then the instruction
> preparing value to zero high 32-bit of the destination register could be
> counted as one cycle, the sequence then could be something like:
> 
>    local_csr_wr[ActLMAddr3, gprB_5]
>    nop
>    nop
>    immed[gprB_5, 0]
> 
> However, we have zero extension optimization that zeroing high 32-bit could
> be eliminated, therefore above IMMED insn won't be available for which case
> the first sequence needs to be generated.
> 
> Fixes: 0b4de1ff19bf ("nfp: bpf: eliminate zero extension code-gen")
> Signed-off-by: Jiong Wang <jiong.wang@...ronome.com>
> Reviewed-by: Jakub Kicinski <jakub.kicinski@...ronome.com>

Applied, thanks!

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