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Date: Mon, 9 Sep 2019 09:56:08 -0700
From: Florian Fainelli <f.fainelli@...il.com>
To: Vitaly Gaiduk <vitaly.gaiduk@...udbear.ru>, davem@...emloft.net,
robh+dt@...nel.org
Cc: Mark Rutland <mark.rutland@....com>, Andrew Lunn <andrew@...n.ch>,
Heiner Kallweit <hkallweit1@...il.com>,
Trent Piepho <tpiepho@...inj.com>, netdev@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 2/2] net: phy: dp83867: Add SGMII mode type switching
On 9/9/19 9:52 AM, Vitaly Gaiduk wrote:
> This patch adds ability to switch beetween two PHY SGMII modes.
> Some hardware, for example, FPGA IP designs may use 6-wire mode
> which enables differential SGMII clock to MAC.
>
> Signed-off-by: Vitaly Gaiduk <vitaly.gaiduk@...udbear.ru>
Reviewed-by: Florian Fainelli <f.fainelli@...il.com>
--
Florian
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