netdev - Re: [PATCH V2] net: dsa: microchip: Always set regmap stride to 1

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Date:   Sat, 28 Sep 2019 03:56:25 +0200
From:   Marek Vasut <marex@...x.de>
To:     George McCollister <george.mccollister@...il.com>
Cc:     netdev@...r.kernel.org, Andrew Lunn <andrew@...n.ch>,
        "David S . Miller" <davem@...emloft.net>,
        Florian Fainelli <f.fainelli@...il.com>,
        Tristram Ha <Tristram.Ha@...rochip.com>,
        Vivien Didelot <vivien.didelot@...oirfairelinux.com>,
        Woojung Huh <woojung.huh@...rochip.com>
Subject: Re: [PATCH V2] net: dsa: microchip: Always set regmap stride to 1

On 9/26/19 3:52 PM, George McCollister wrote:
> On Wed, Sep 25, 2019 at 5:08 PM Marek Vasut wrote:
>>
>> The regmap stride is set to 1 for regmap describing 8bit registers already.
>> However, for 16/32/64bit registers, the stride is 2/4/8 respectively. This
>> is not correct, as the switch protocol supports unaligned register reads
>> and writes and the KSZ87xx even uses such unaligned register accesses to
>> read e.g. MIB counter.
>>
>> This patch fixes MIB counter access on KSZ87xx.
> 
> After looking through a couple hundred pages of register documentation
> for KSZ9477 and KSZ9567 I find only registers that are aligned to
> their width. In my testing the KSZ9567 works fine with and without the
> patch. The only downside is that all of the unaligned registers
> needlessly show up in the debugfs regmap, this doesn't really matter
> though. As long as it fixes the issues on KSZ87xx this looks fine to
> me.

Right.

To avoid exposing all registers through regmap debugfs entries, we would
have to define the regmap constrains for
readable/writeable/volatile/precious registers, which we should
eventually do anyway, but that's way beyond the scope of this fix.